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Results 1 - 9 of 9 for fmadd (0.1 sec)
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src/cmd/asm/internal/asm/testdata/ppc64.s
FDIVSCC F1, F2, F3 // ec620825 FTDIV F1, F2, $2 // fd011100 FTSQRT F1, $2 // fd000940 FMADD F1, F2, F3, F4 // fc8110fa FMADDCC F1, F2, F3, F4 // fc8110fb FMADDS F1, F2, F3, F4 // ec8110fa FMADDSCC F1, F2, F3, F4 // ec8110fb FMSUB F1, F2, F3, F4 // fc8110f8 FMSUBCC F1, F2, F3, F4 // fc8110f9
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Fri May 17 21:53:50 UTC 2024 - 50.2K bytes - Viewed (0) -
src/cmd/compile/internal/ssa/_gen/PPC64.rules
(Sqrt32 ...) => (FSQRTS ...) (Floor ...) => (FFLOOR ...) (Ceil ...) => (FCEIL ...) (Trunc ...) => (FTRUNC ...) (Round ...) => (FROUND ...) (Copysign x y) => (FCPSGN y x) (Abs ...) => (FABS ...) (FMA ...) => (FMADD ...) // Lowering extension // Note: we always extend to 64 bits even though some ops don't need that many result bits. (SignExt8to(16|32|64) ...) => (MOVBreg ...) (SignExt16to(32|64) ...) => (MOVHreg ...)
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Fri Jun 07 19:02:52 UTC 2024 - 53.2K bytes - Viewed (0) -
src/cmd/compile/internal/ssa/_gen/S390X.rules
(Sqrt ...) => (FSQRT ...) (Floor x) => (FIDBR [7] x) (Ceil x) => (FIDBR [6] x) (Trunc x) => (FIDBR [5] x) (RoundToEven x) => (FIDBR [4] x) (Round x) => (FIDBR [1] x) (FMA x y z) => (FMADD z x y) (Sqrt32 ...) => (FSQRTS ...) // Atomic loads and stores. // The SYNC instruction (fast-BCR-serialization) prevents store-load // reordering. Other sequences of memory operations (load-load,
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Thu Oct 12 18:09:26 UTC 2023 - 74.3K bytes - Viewed (0) -
src/cmd/compile/internal/ssa/_gen/ARM64Ops.go
{name: "LoweredRound64F", argLength: 1, reg: fp11, resultInArg0: true, zeroWidth: true}, // 3-operand, the addend comes first {name: "FMADDS", argLength: 3, reg: fp31, asm: "FMADDS"}, // +arg0 + (arg1 * arg2) {name: "FMADDD", argLength: 3, reg: fp31, asm: "FMADDD"}, // +arg0 + (arg1 * arg2) {name: "FNMADDS", argLength: 3, reg: fp31, asm: "FNMADDS"}, // -arg0 - (arg1 * arg2)
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Thu May 23 15:49:20 UTC 2024 - 58.8K bytes - Viewed (0) -
src/cmd/asm/internal/asm/testdata/arm64.s
VUMIN V3.S2, V2.S2, V1.S2 // 416ca32e VUMIN V3.S4, V2.S4, V1.S4 // 416ca36e FCCMPS LT, F1, F2, $1 // 41b4211e FMADDS F1, F3, F2, F4 // 440c011f FMADDD F4, F5, F4, F4 // 8414441f FMSUBS F13, F21, F13, F19 // b3d50d1f FMSUBD F11, F7, F15, F31 // ff9d4b1f FNMADDS F1, F3, F2, F4 // 440c211f
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Fri Dec 08 03:28:17 UTC 2023 - 94.9K bytes - Viewed (0) -
src/cmd/internal/obj/mips/asm0.go
opset(AMOVH, r0) case AMOVBU: opset(AMOVHU, r0) case AMUL: opset(AREM, r0) opset(AREMU, r0) opset(ADIVU, r0) opset(AMULU, r0) opset(ADIV, r0) opset(AMADD, r0) opset(AMSUB, r0) case AMULV: opset(ADIVV, r0) opset(ADIVVU, r0) opset(AMULVU, r0) opset(AREMV, r0) opset(AREMVU, r0) case ASLL: opset(ASRL, r0)
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Tue Apr 16 17:46:09 UTC 2024 - 53.6K bytes - Viewed (0) -
src/cmd/internal/obj/loong64/asm.go
AAMCASB: 0x070B0 << 15, // amcas.b AAMCASH: 0x070B1 << 15, // amcas.h AAMCASW: 0x070B2 << 15, // amcas.w AAMCASV: 0x070B3 << 15, // amcas.d AAMADDW: 0x070C2 << 15, // amadd.w AAMADDV: 0x070C3 << 15, // amadd.d AAMANDW: 0x070C4 << 15, // amand.w AAMANDV: 0x070C5 << 15, // amand.d AAMORW: 0x070C6 << 15, // amor.w AAMORV: 0x070C7 << 15, // amor.d AAMXORW: 0x070C8 << 15, // amxor.w
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Wed May 22 02:04:54 UTC 2024 - 61.8K bytes - Viewed (0) -
src/text/template/exec_test.go
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Fri May 24 22:23:55 UTC 2024 - 60.1K bytes - Viewed (0) -
src/cmd/internal/testdir/testdir_test.go
// assembler source (that is, what is left on each line of the // compile -S output after we strip file/line info) to avoid // trivial bugs such as "ADD" matching "FADD". This // doesn't remove genericity: it's still possible to write // something like "F?ADD", but we make common cases simpler // to get right. oprx, err := regexp.Compile("^" + rxsrc)
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Thu Mar 21 20:08:06 UTC 2024 - 57.5K bytes - Viewed (0)