FNMSUBS:        "fnmsubs",
	FNMSUBSCC:      "fnmsubs.",
	FRES:           "fres",
	FRESCC:         "fres.",
	FRSQRTE:        "frsqrte",
	FRSQRTECC:      "frsqrte.",
	FSEL:           "fsel",
	FSELCC:         "fsel.",
	FSQRTS:         "fsqrts",
	FSQRTSCC:       "fsqrts.",
	FSUBS:          "fsubs",
	FSUBSCC:        "fsubs.",
	ICBI:           "icbi",
	LD:             "ld",

	// result: (ISEL [a] x y cmp)
	for {
		x := v_0
		y := v_1
		if v_2.Op != OpPPC64SETBC {
			break
		}
		a := auxIntToInt32(v_2.AuxInt)
		cmp := v_2.Args[0]
		v.reset(OpPPC64ISEL)
		v.AuxInt = int32ToAuxInt(a)
		v.AddArg3(x, y, cmp)
		return true
	}
	// match: (CondSelect x y (SETBCR [a] cmp))
	// result: (ISEL [a+4] x y cmp)
	for {
		x := v_0

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