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Results 1 - 2 of 2 for divd (0.06 sec)

  1. src/cmd/compile/internal/ssa/rewritePPC64.go

    	// match: (Div32 [false] x y)
    	// result: (DIVW x y)
    	for {
    		if auxIntToBool(v.AuxInt) != false {
    			break
    		}
    		x := v_0
    		y := v_1
    		v.reset(OpPPC64DIVW)
    		v.AddArg2(x, y)
    		return true
    	}
    	return false
    }
    func rewriteValuePPC64_OpDiv64(v *Value) bool {
    	v_1 := v.Args[1]
    	v_0 := v.Args[0]
    	// match: (Div64 [false] x y)
    	// result: (DIVD x y)
    	for {
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Fri Jun 07 19:02:52 UTC 2024
    - 360.2K bytes
    - Viewed (0)
  2. tensorflow/compiler/mlir/lite/tests/optimize.mlir

    // Fusing-LABEL: FusingdivRelu
    // Fusing:  %[[div:[0-9].*]] = tfl.div %arg0, %arg1 {fused_activation_function = "NONE"} : tensor<1xf32>
    // Fusing:  %[[div1:[0-9].*]] = tfl.div %arg0, %[[div]] {fused_activation_function = "RELU"} : tensor<1xf32>
    // Fusing:  %[[relu:[0-9].*]] = "tfl.relu"(%arg0) : (tensor<1xf32>) -> tensor<1xf32>
    // Fusing:  %[[div2:[0-9].*]] = tfl.div %[[relu]], %[[div1]] {fused_activation_function = "RELU6"} : tensor<1xf32>
    Registered: Sun Jun 16 05:45:23 UTC 2024
    - Last Modified: Thu May 16 20:31:41 UTC 2024
    - 284.1K bytes
    - Viewed (0)
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