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Results 1 - 10 of 16 for size_a (0.22 sec)
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tensorflow/c/c_api.cc
size_t size = results.missing_unused_input_map_keys.size(); tf_results->missing_unused_key_names.resize(size); tf_results->missing_unused_key_indexes.resize(size); for (int i = 0; i < size; ++i) { TensorId id = results.missing_unused_input_map_keys[i]; tf_results->missing_unused_key_names_data.emplace_back(id.first); tf_results->missing_unused_key_names[i] =
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Mon Apr 15 03:35:10 UTC 2024 - 102.3K bytes - Viewed (0) -
tensorflow/compiler/mlir/lite/ir/tfl_ops.cc
} axis++; } } DenseIntElementsAttr size; if (matchPattern(op.getSize(), m_Constant(&size))) { int axis = 0; for (const auto& size_i : llvm::enumerate(size)) { if (size_i.value().getSExtValue() < -1) { return op.emitError( llvm::formatv("size[{0}] cannot be negative other than -1", axis)); } axis++; } }
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Thu May 02 09:41:17 UTC 2024 - 169.2K bytes - Viewed (0) -
tensorflow/compiler/mlir/lite/flatbuffer_export.cc
<< ") != terminator operands (" << term->getNumOperands() << ")"; return {}; } // Verify number of tensors for inputs and outputs matches size // of the list in the signature def. if (input_names.size() != sig_def_inputs.size() || output_names.size() != sig_def_outputs.size()) { main_op.emitWarning(
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Wed Jun 12 21:41:49 UTC 2024 - 164.5K bytes - Viewed (2) -
tensorflow/compiler/mlir/lite/stablehlo/transforms/legalize_hlo.cc
} // Returns the number of elements in `range`. template <typename Range> size_t Size(Range&& range) { return range.size(); } // Returns the total number of elements in a variadic number of `ranges`. template <typename Range, typename... RangeTs> size_t Size(Range&& range, RangeTs&&... ranges) { return range.size() + Size(std::forward<RangeTs>(ranges)...); }
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Thu Apr 25 16:01:03 UTC 2024 - 154.9K bytes - Viewed (0) -
tensorflow/compiler/mlir/tensorflow/ir/tf_ops_n_z.cc
} RankedTensorType size_ty = GetRankedTensorTypeForOperand(op.getSize()); if (size_ty && size_ty.getRank() != 1) { return op.emitOpError() << "requires size operand to be 1D tensor"; } if (!begin_ty || !size_ty || !begin_ty.hasStaticShape() || !size_ty.hasStaticShape()) return success(); if (begin_ty.getNumElements() != size_ty.getNumElements()) {
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Thu May 09 22:07:10 UTC 2024 - 170.8K bytes - Viewed (0) -
tensorflow/compiler/mlir/tensorflow/transforms/shape_inference.cc
if (!(verify_size(window_dimensions.size(), "window_dimensions") && verify_size(window_strides.size(), "window strides") && verify_size(padding.size(), "padding entries") && verify_size(lhs_dilation.size(), "lhs dilation factors") && verify_size(rhs_dilation.size(), "rhs dilation factors"))) return std::nullopt; xla::Window window; for (size_t i = 0; i < window_dimensions.size(); i++) {
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Sat Jun 08 07:28:49 UTC 2024 - 134.1K bytes - Viewed (0) -
tensorflow/compiler/mlir/lite/transforms/optimize.cc
size_t agg_start_idx) { ArrayRef<int64_t> input_shape = mlir::cast<ShapedType>(input.getType()).getShape(); ArrayRef<int64_t> output_shape = mlir::cast<ShapedType>(output.getType()).getShape(); int64_t agg_value = 1; for (size_t i = agg_start_idx; i < input_shape.size() - 1; ++i) { agg_value *= input_shape[i]; }
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Tue Apr 30 00:40:15 UTC 2024 - 102.3K bytes - Viewed (1) -
tensorflow/compiler/mlir/tensorflow/ir/tf_ops_a_m.cc
return op.emitOpError() << "requires N to be at least 2, got " << op.getN(); if (op.getShape().size() != op.getOffset().size()) return op.emitOpError() << "requires sizes of shapes and offsets to be the same, got sizes " << op.getShape().size() << " and " << op.getOffset().size(); auto ranked_dim = mlir::dyn_cast<RankedTensorType>(op.getConcatDim().getType());
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Thu Apr 25 16:01:03 UTC 2024 - 146.7K bytes - Viewed (0) -
src/cmd/internal/obj/arm64/asm7.go
r := int((p.Reg) & 31) Q := 0 size := 0 switch af { case ARNG_16B: Q = 1 size = 0 case ARNG_2D: Q = 1 size = 3 case ARNG_2S: Q = 0 size = 2 case ARNG_4H: Q = 0 size = 1 case ARNG_4S: Q = 1 size = 2 case ARNG_8B: Q = 0 size = 0 case ARNG_8H: Q = 1 size = 1
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Wed May 15 15:44:14 UTC 2024 - 201.1K bytes - Viewed (0) -
src/debug/elf/elf.go
DT_RELA DynTag = 7 /* Address of ElfNN_Rela relocations. */ DT_RELASZ DynTag = 8 /* Total size of ElfNN_Rela relocations. */ DT_RELAENT DynTag = 9 /* Size of each ElfNN_Rela relocation entry. */ DT_STRSZ DynTag = 10 /* Size of string table. */ DT_SYMENT DynTag = 11 /* Size of each symbol table entry. */ DT_INIT DynTag = 12 /* Address of initialization function. */
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Tue Apr 16 00:01:16 UTC 2024 - 134.6K bytes - Viewed (0)