Search Options

Results per page
Sort
Preferred Languages
Advance

Results 1 - 4 of 4 for UNDEF (0.09 sec)

  1. tensorflow/c/c_api.cc

                         nullptr);
    TF_DEVICELIST_METHOD(int64_t, TF_DeviceListMemoryBytes, memory_limit(), -1);
    TF_DEVICELIST_METHOD(uint64_t, TF_DeviceListIncarnation, incarnation(), 0);
    
    #undef TF_DEVICELIST_METHOD
    
    }  // end extern "C"
    
    // --------------------------------------------------------------------------
    // New Graph and Session API
    
    Registered: Sun Jun 16 05:45:23 UTC 2024
    - Last Modified: Mon Apr 15 03:35:10 UTC 2024
    - 102.3K bytes
    - Viewed (0)
  2. src/cmd/internal/obj/arm64/asm7.go

    			fmt.Printf("note: flush literal pool at %#x: len=%d ref=%x\n", uint64(p.Pc+4), c.pool.size, c.pool.start)
    		}
    		q := c.newprog()
    		if p.Link == nil {
    			// If p is the last instruction of the function, insert an UNDEF instruction in case the
    			// execution fall through to the pool.
    			q.As = obj.AUNDEF
    		} else {
    			// Else insert a branch to the next instruction of p.
    			q.As = AB
    			q.To.Type = obj.TYPE_BRANCH
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Wed May 15 15:44:14 UTC 2024
    - 201.1K bytes
    - Viewed (0)
  3. src/cmd/internal/obj/ppc64/asm9.go

    		} else {
    			c.ctxt.Diag("illegal syscall: %v", p)
    			o1 = 0x7fe00008 // trap always
    		}
    
    		o2 = c.oprrr(p.As)
    		o3 = AOP_RRR(c.oprrr(AXOR), REGZERO, REGZERO, REGZERO) // XOR R0, R0
    
    	case 78: /* undef */
    		o1 = 0 /* "An instruction consisting entirely of binary 0s is guaranteed
    		   always to be an illegal instruction."  */
    
    	/* relocation operations */
    	case 74:
    		var rel *obj.Reloc
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Wed May 15 13:55:28 UTC 2024
    - 156.1K bytes
    - Viewed (0)
  4. src/cmd/internal/obj/s390x/asmz.go

    			c.ctxt.Diag("illegal system call; system call number out of range: %v", p)
    			zE(op_TRAP2, asm) // trap always
    		} else {
    			zI(op_SVC, uint32(p.From.Offset), asm)
    		}
    
    	case 78: // undef
    		// "An instruction consisting entirely of binary 0s is guaranteed
    		// always to be an illegal instruction."
    		*asm = append(*asm, 0, 0, 0, 0)
    
    	case 79: // compare and swap reg reg reg
    		v := c.regoff(&p.To)
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Tue Apr 16 17:46:09 UTC 2024
    - 176.7K bytes
    - Viewed (0)
Back to top