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Results 1 - 10 of 20 for constants_ (1.19 sec)
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tensorflow/compiler/mlir/lite/tests/legalize-tf.mlir
// CHECK-DAG: [[VAL_8:%.*]] = arith.constant dense<0.000000e+00> : tensor<16x16xf32> // CHECK-DAG: [[VAL_9:%.*]] = arith.constant dense<0.000000e+00> : tensor<16x8xf32> // CHECK-DAG: [[VAL_10:%.*]] = arith.constant dense<0.000000e+00> : tensor<16xf32> // CHECK-DAG: [[VAL_11:%.*]] = arith.constant dense<0.000000e+00> : tensor<1x16xf32> // CHECK-DAG: [[VAL_12:%.*]] = arith.constant dense<0.000000e+00> : tensor<8x16xf32>
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Wed Jun 05 01:54:33 UTC 2024 - 153.4K bytes - Viewed (0) -
tensorflow/compiler/mlir/lite/stablehlo/tests/uniform-quantized-stablehlo-to-tfl.mlir
// CHECK-DAG: %[[BROADCAST_DIM:.+]] = arith.constant dense<{{\[3, 2, 1, 1, 4\]}}> : tensor<5xi32> // CHECK-DAG: %[[EXPAND_DIM1:.+]] = arith.constant dense<3> : tensor<1xi32> // CHECK-DAG: %[[EXPAND_DIM0:.+]] = arith.constant dense<2> : tensor<1xi32> // CHECK-DAG: %[[PERM:.+]] = arith.constant dense<{{\[1, 0, 2\]}}> : tensor<3xi32>
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Tue May 14 17:10:32 UTC 2024 - 106.2K bytes - Viewed (0) -
tensorflow/compiler/mlir/lite/flatbuffer_export.cc
} static bool IsConst(Operation* op) { return isa<mlir::func::ConstantOp, mlir::arith::ConstantOp, mlir::TF::ConstOp, tfl::ConstOp, tfl::QConstOp, tfl::SparseConstOp, tfl::SparseQConstOp, mlir::TFL::NoValueOp, mlir::stablehlo::ConstantOp, mlir::vhlo::ConstantOpV1>(op); } static bool IsTFResourceOp(Operation* op) {
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Wed Jun 12 21:41:49 UTC 2024 - 164.5K bytes - Viewed (0) -
src/cmd/internal/obj/arm64/asm7.go
return C_SPR } return C_GOK } // con32class reclassifies the constant of 32-bit instruction. Because the constant type is 32-bit, // but saved in Offset which type is int64, con32class treats it as uint32 type and reclassifies it. func (c *ctxt7) con32class(a *obj.Addr) int { v := uint32(a.Offset) // For 32-bit instruction with constant, rewrite // the high 32-bit to be a repetition of the low
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Wed May 15 15:44:14 UTC 2024 - 201.1K bytes - Viewed (0) -
pilot/pkg/networking/core/cluster_builder_test.go
v3 "istio.io/istio/pilot/pkg/xds/v3" "istio.io/istio/pilot/test/xdstest" istiocluster "istio.io/istio/pkg/cluster" "istio.io/istio/pkg/config" "istio.io/istio/pkg/config/constants" "istio.io/istio/pkg/config/host" "istio.io/istio/pkg/config/labels" "istio.io/istio/pkg/config/protocol" "istio.io/istio/pkg/config/schema/gvk" "istio.io/istio/pkg/network" "istio.io/istio/pkg/security"
Registered: Fri Jun 14 15:00:06 UTC 2024 - Last Modified: Thu Jun 13 01:56:28 UTC 2024 - 110.4K bytes - Viewed (0) -
pkg/config/validation/validation.go
if err := checkDryRunAnnotation(config, isAuthz); err != nil { return nil, err } if _, f := config.Annotations[constants.AlwaysReject]; f { return nil, fmt.Errorf("%q annotation found, rejecting", constants.AlwaysReject) } return f(config) } } func checkDryRunAnnotation(cfg config.Config, allowed bool) error {
Registered: Fri Jun 14 15:00:06 UTC 2024 - Last Modified: Wed Jun 12 04:03:33 UTC 2024 - 107.2K bytes - Viewed (0) -
src/cmd/internal/obj/ppc64/asm9.go
} } return C_GOK case obj.TYPE_TEXTSIZE: return C_TEXTSIZE case obj.TYPE_FCONST: // The only cases where FCONST will occur are with float64 +/- 0. // All other float constants are generated in memory. f64 := a.Val.(float64) if f64 == 0 { if math.Signbit(f64) { return C_S16CON } return C_ZCON } log.Fatalf("Unexpected nonzero FCONST operand %v", a)
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Wed May 15 13:55:28 UTC 2024 - 156.1K bytes - Viewed (0) -
src/cmd/compile/internal/ssa/_gen/generic.rules
// Reassociate expressions involving // constants such that constants come first, // exposing obvious constant-folding opportunities. // Reassociate (op (op y C) x) to (op C (op x y)) or similar, where C // is constant, which pushes constants to the outside // of the expression. At that point, any constant-folding // opportunities should be obvious.
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Thu May 16 22:21:05 UTC 2024 - 135.3K bytes - Viewed (0) -
src/cmd/compile/internal/ssa/_gen/ARM64.rules
// If the shift amount is larger than the datasize(32, 16, 8), we can optimize to constant 0. (MOVWUreg (SLLconst [lc] x)) && lc >= 32 => (MOVDconst [0]) (MOVHUreg (SLLconst [lc] x)) && lc >= 16 => (MOVDconst [0]) (MOVBUreg (SLLconst [lc] x)) && lc >= 8 => (MOVDconst [0]) // After zero extension, the upper (64-datasize(32|16|8)) bits are zero, we can optimiza to constant 0. (SRLconst [rc] (MOVWUreg x)) && rc >= 32 => (MOVDconst [0])
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Thu May 23 15:49:20 UTC 2024 - 113.1K bytes - Viewed (0) -
src/cmd/internal/obj/x86/asm6.go
// of more general Ytypes that it satisfies is implied by the ycover table, set // up in instinit. For example, oclass distinguishes the constants 0 and 1 // from the more general 8-bit constants, but instinit says // // ycover[Yi0*Ymax+Ys32] = 1 // ycover[Yi1*Ymax+Ys32] = 1 // ycover[Yi8*Ymax+Ys32] = 1 // // which means that Yi0, Yi1, and Yi8 all count as Ys32 (signed 32)
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Wed May 15 15:44:14 UTC 2024 - 146.9K bytes - Viewed (0)