{memAddr(REG_DI, REG_Y7), Yyvm},
		{memAddr(REG_DI, REG_Z0), Yzvm},
		{memAddr(REG_DI, REG_Z7), Yzvm},
	}

	oclassTestsAMD64 = []*oclassTest{
		{immAddr(-200), Ys32},
		{immAddr(500), Ys32},
		{immAddr(0x7FFFFFFF), Ys32},
		{immAddr(0x7FFFFFFF + 1), Yi32},
		{immAddr(0xFFFFFFFF), Yi32},
		{immAddr(0xFFFFFFFF + 1), Yi64},

		{regAddr(REG_BPB), Yrb},
		{regAddr(REG_SIB), Yrb},

	ycover[Yi0*Ymax+Ys32] = 1
	ycover[Yi1*Ymax+Ys32] = 1
	ycover[Yu2*Ymax+Ys32] = 1
	ycover[Yu7*Ymax+Ys32] = 1
	ycover[Yu8*Ymax+Ys32] = 1
	ycover[Yi8*Ymax+Ys32] = 1

	ycover[Yi0*Ymax+Yi32] = 1
	ycover[Yi1*Ymax+Yi32] = 1
	ycover[Yu2*Ymax+Yi32] = 1
	ycover[Yu7*Ymax+Yi32] = 1
	ycover[Yu8*Ymax+Yi32] = 1
	ycover[Yi8*Ymax+Yi32] = 1
	ycover[Ys32*Ymax+Yi32] = 1

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under512:
	SRDCC $3, R6, R7  // 64 byte chunks?
	XXLXOR VS32, VS32, VS32 // clear VS32 (V0)
	BEQ   lt64gt8

	// Prepare to clear 64 bytes at a time.

zero64setup:
	DCBTST (R3)             // prepare data cache
	MOVD   R7, CTR          // number of 64 byte chunks
	MOVD   $16, R8
	MOVD   $32, R16
	MOVD   $48, R17

zero64:
	STXVD2X VS32, (R3+R0)   // store 16 bytes
	STXVD2X VS32, (R3+R8)
	STXVD2X VS32, (R3+R16)

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een255\blue255;} {\*\expandedcolortbl;;} \deftab720 \pard\pardeftab720\partightenfactor0 \f0\i\fs32 \cf0 With \f1 *.pdf \f0 filter}WrapNOBounds{{396.15625, 51}, {109, 30}}ClassShapedGraphicFi{\rtf1\ansi\ansicpg1252\cocoartf1561\cocoasubrtf200 {\fonttbl\f0\fnil\fcharset0 HelveticaNeue;} {\colortbl;\red255\green255\blue255;} {\*\expandedcolortbl;;} \deftab720 \pard\pardeftab720\partightenfactor0 \f0\fs32 \cf0 my-report.pdf}WrapNOAllowLabelDrop{380, 51}{380, 67.55078125}{396.15625, 67.55078125}Styl...

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