REG_VS62
	REG_VS63

	REG_CR0
	REG_CR1
	REG_CR2
	REG_CR3
	REG_CR4
	REG_CR5
	REG_CR6
	REG_CR7

	// MMA accumulator registers, these shadow VSR 0-31
	// e.g MMAx shadows VSRx*4-VSRx*4+3 or
	//     MMA0 shadows VSR0-VSR3
	REG_A0
	REG_A1
	REG_A2
	REG_A3
	REG_A4
	REG_A5
	REG_A6
	REG_A7

	REG_MSR
	REG_FPSCR
	REG_CR

	REG_SPECIAL = REG_CR0

#define INP R3
#define OUTP R4
#define LEN R5
#define KEYP R6
#define ROUNDS R7
#define IVP R8
#define ENC R9

#define INOUT V2
#define TMP V3
#define IVEC V4

// Load the crypt key into VSRs.
//
// The expanded key is stored and loaded using
// STXVD2X/LXVD2X. The in-memory byte ordering
// depends on the endianness of the machine. The
// expanded keys are generated by expandKeyAsm above.
//

	VSLDBI V1, V2, $3, V3                   // 106110d6
	VSLQ V1, V2, V3                         // 10611105
	VSRAQ V1, V2, V3                        // 10611305
	VSRDBI V1, V2, $3, V4                   // 108112d6
	VSRQ V1, V2, V3                         // 10611205
	VSTRIBL V1, V2                          // 1040080d
	VSTRIBLCC V1, V2                        // 10400c0d
	VSTRIBR V1, V2                          // 1041080d

	VAQ	V1, V2                  // e721200040f3
	VSB	V3, V4, V4              // e744300000f7
	VSH	V3, V4, V4              // e744300010f7
	VSF	V3, V4, V4              // e744300020f7
	VSG	V3, V4, V4              // e744300030f7
	VSQ	V3, V4, V4              // e744300040f7
	VSB	V1, V2                  // e722100000f7
	VSH	V1, V2                  // e722100010f7
	VSF	V1, V2                  // e722100020f7

	ADD     $-2, R4, R16
	PCALIGN $16
loopback:
	ADD     $-1, R8, R10
	SLD     $3, R10
	LXVD2X  (R6)(R10), VS32 // load x[i-1], x[i]
	SLD     $3, R8, R12
	LXVD2X  (R6)(R12), VS33 // load x[i], x[i+1]

	VSRD    V0, V4, V3      // x[i-1]>>s, x[i]>>s
	VSLD    V1, V2, V5      // x[i]<<ŝ, x[i+1]<<ŝ
	VOR     V3, V5, V5      // Or(|) the two registers together
	STXVD2X VS37, (R3)(R10) // store into z[i-1] and z[i]

	"XSCVQPUQZ",
	"XSCVQPSQZ",
	"XSCMPGTQP",
	"XSCMPGEQP",
	"XSCMPEQQP",
	"VSTRIHRCC",
	"VSTRIHR",
	"VSTRIHLCC",
	"VSTRIHL",
	"VSTRIBRCC",
	"VSTRIBR",
	"VSTRIBLCC",
	"VSTRIBL",
	"VSRQ",
	"VSRDBI",
	"VSRAQ",
	"VSLQ",
	"VSLDBI",
	"VRLQNM",
	"VRLQMI",
	"VRLQ",
	"VPEXTD",
	"VPDEPD",
	"VMULOUD",
	"VMULOSD",
	"VMULLD",
	"VMULHUW",
	"VMULHUD",
	"VMULHSW",