for (int i = 0; i < low_pads.size(); ++i) {
    new_low_pads[i] = low_pads[i].getInt() + parent_low_pads[i].getInt();
    new_high_pads[i] = high_pads[i].getInt() + parent_high_pads[i].getInt();
    new_interior_pads[i] =
        interior_pads[i].getInt() + parent_interior_pads[i].getInt();
  }

  // Replace pad_op with a new pad having new attributes, taking the

  const std::vector<int> kValidNumOfOutput = {1, 2, 3};
  if (input_type.getRank() >= kValidNumOfOutput.size()) {
    return func.emitError()
           << "Unrecognized input rank: " << input_type.getRank();
  }
  if (func.getNumResults() != kValidNumOfOutput[input_type.getRank()]) {
    return func.emitError()
           << "Expect " << kValidNumOfOutput[input_type.getRank()]
           << "output(s) when input has rank " << input_type.getRank();

      hlo::convertElementsAttr(group_assignment, builder.getIntegerType(64)));
  if (replica_groups.getType().getRank() != 2) {
    return op->emitOpError() << "group_assignment should have rank 2, got "
                             << replica_groups.getType().getRank();
  }
  return success();
}

ChannelHandleAttr ConvertChannel(OpBuilder& builder, int64_t channel_id,

  }

  const int64_t rank = input_type.getRank();

  IntegerAttr dim_int = ExtractSingleElementAsInteger(split_dim_attr);

  // "axis" operand could be a i64 tensor. Resolve it here.
  IntegerAttr dim_i32;
  if (failed(ConvertToI32Attr(dim_int, &dim_i32))) return failure();

  int dim = dim_i32.getInt();
  if (dim < 0) dim += rank;

  for (int i : llvm::seq<int>(1, num_dims - 1)) {
    Value input_size_i = GetDimValue(builder, loc, input_shape_value, i);
    const int stride_i = mlir::cast<IntegerAttr>(strides[i]).getInt();
    const int dilation_i = mlir::cast<IntegerAttr>(dilations[i]).getInt();
    const int filter_i = filter_shape.getDimSize(i - 1);
    Value pad_i_low, pad_i_high;
    GetSamePaddingValues(builder, loc, input_size_i, filter_i, dilation_i,

                         (TFL_TopKV2Op $input, $k)>;

def ReductionDimensionIsLastDim : Constraint<CPred<"($0.cast<IntegerAttr>().getInt() == "
  "$1.getType().cast<ShapedType>().getRank() - 1 || $0.cast<IntegerAttr>().getInt() == -1)">>;

// Legalizes TF_ApproxTopKOp to TFL_TopKV2Op with the following constraints:
//    1. It computes max k

  auto input_shape = mlir::cast<ShapedType>(input.getType());
  auto filter_shape = mlir::cast<ShapedType>(filter.getType());
  if (!input_shape.hasRank() || input_shape.getRank() != 4 ||
      !filter_shape.hasRank() || filter_shape.getRank() != 4) {
    emitError(loc, "input and filter are expected to be 4D tensors");
    return {};
  }

  const int feature_group_cnt =

  }

  const int64_t padding_nums_size = 2 * (rhs_shape.getRank() - 2);
  padding_nums.reserve(padding_nums_size);
  if (conv_padding.strref() == "EXPLICIT") {
    for (auto padding_elem :
         op.getExplicitPaddingAttr().template getAsRange<IntegerAttr>()) {
      padding_nums.push_back(padding_elem.getInt());
    }
  } else if (conv_padding.strref() == "VALID") {

  ArrayAttr stride = mlir::dyn_cast<ArrayAttr>(identifier_to_attr["strides"]);
  const int stride_h = mlir::cast<IntegerAttr>(stride[1]).getInt();
  const int stride_w = mlir::cast<IntegerAttr>(stride[2]).getInt();
  return rewriter.getI64ArrayAttr({stride_h, stride_w});
}

Attribute GetLhsDilationValue(PatternRewriter& rewriter,

  ASSERT_EQ(-2147483648, op.getLhsQuantizationMinValAttr().getInt());
  ASSERT_EQ(2147483647, op.getRhsQuantizationMaxValAttr().getInt());
  ASSERT_EQ(-2147483648, op.getRhsQuantizationMinValAttr().getInt());
  ASSERT_EQ(2147483647, op.getOutputQuantizationMaxValAttr().getInt());
  ASSERT_EQ(-2147483648, op.getOutputQuantizationMinValAttr().getInt());