var x32 [2]uint32
var x64 [2]uint64

func compMem1() int {
	// amd64:`CMPB\tcommand-line-arguments.x\+1\(SB\), [$]0`
	if x[1] {
		return 1
	}
	// amd64:`CMPB\tcommand-line-arguments.x8\+1\(SB\), [$]7`
	if x8[1] == 7 {
		return 1
	}
	// amd64:`CMPW\tcommand-line-arguments.x16\+2\(SB\), [$]7`
	if x16[1] == 7 {
		return 1
	}
	// amd64:`CMPL\tcommand-line-arguments.x32\+4\(SB\), [$]7`
	if x32[1] == 7 {
		return 1
	}

		{name: "CMPL", argLength: 2, reg: gp2flags, asm: "CMPL", typ: "Flags"},                    // arg0 compare to arg1
		{name: "CMPW", argLength: 2, reg: gp2flags, asm: "CMPW", typ: "Flags"},                    // arg0 compare to arg1
		{name: "CMPB", argLength: 2, reg: gp2flags, asm: "CMPB", typ: "Flags"},                    // arg0 compare to arg1

		for x := 0; x <= size-n; x = x*7 + 1 { // offset in src
			for y := 0; y <= size-n; y = y*9 + 1 { // offset in dst
				copy(dst[y:y+n], src[x:x+n])
				copyref(ref[y:y+n], src[x:x+n])
				p := cmpb(dst, ref)
				if p >= 0 {
					t.Fatalf("Copy failed, copying from src[%d:%d] to dst[%d:%d].\nOffset %d is different, %v != %v", x, x+n, y, y+n, p, dst[p], ref[p])
				}
			}
		}
	}
}

//go:build !purego

// func addMulVVW1024(z *uint, x *uint, y uint) (c uint)
// Requires: ADX, BMI2
TEXT ·addMulVVW1024(SB), $0-32
	CMPB ·supportADX+0(SB), $0x01
	JEQ  adx
	MOVQ z+0(FP), CX
	MOVQ x+8(FP), BX
	MOVQ y+16(FP), SI
	XORQ DI, DI

	// Iteration 0
	MOVQ (BX), AX
	MULQ SI
	ADDQ (CX), AX
	ADCQ $0x00, DX
	ADDQ DI, AX

	MOVL	$1, 0(SP)
	CALL	runtime·exit(SB)
	CALL	runtime·abort(SB)

has_cpuid:
	MOVL	$0, AX
	CPUID
	MOVL	AX, SI
	CMPL	AX, $0
	JE	nocpuinfo

	CMPL	BX, $0x756E6547  // "Genu"
	JNE	notintel
	CMPL	DX, $0x49656E69  // "ineI"
	JNE	notintel
	CMPL	CX, $0x6C65746E  // "ntel"
	JNE	notintel
	MOVB	$1, runtime·isIntel(SB)
notintel:

	// Load EAX=1 cpuid flags
	MOVL	$1, AX
	CPUID

	v_2 := v.Args[2]
	v_1 := v.Args[1]
	v_0 := v.Args[0]
	b := v.Block
	typ := &b.Func.Config.Types
	// match: (CMPBload {sym} [off] ptr x mem)
	// result: (CMPB (MOVBload {sym} [off] ptr mem) x)
	for {
		off := auxIntToInt32(v.AuxInt)
		sym := auxToSym(v.Aux)
		ptr := v_0
		x := v_1
		mem := v_2
		v.reset(OpAMD64CMPB)

	"CMOVWLS",
	"CMOVWLT",
	"CMOVWMI",
	"CMOVWNE",
	"CMOVWOC",
	"CMOVWOS",
	"CMOVWPC",
	"CMOVWPL",
	"CMOVWPS",
	"CMPB",
	"CMPL",
	"CMPPD",
	"CMPPS",
	"CMPQ",
	"CMPSB",
	"CMPSD",
	"CMPSL",
	"CMPSQ",
	"CMPSS",
	"CMPSW",
	"CMPW",
	"CMPXCHG16B",
	"CMPXCHG8B",
	"CMPXCHGB",
	"CMPXCHGL",
	"CMPXCHGQ",
	"CMPXCHGW",
	"COMISD",
	"COMISS",
	"CPUID",

	TESTQ	BX, BX
	JEQ	move_0
	CMPQ	BX, $2
	JBE	move_1or2
	CMPQ	BX, $4
	JB	move_3
	JBE	move_4
	CMPQ	BX, $8
	JB	move_5through7
	JE	move_8
	CMPQ	BX, $16
	JBE	move_9through16
	CMPQ	BX, $32
	JBE	move_17through32
	CMPQ	BX, $64
	JBE	move_33through64
	CMPQ	BX, $128
	JBE	move_65through128
	CMPQ	BX, $256
	JBE	move_129through256

	TESTB	$1, runtime·useAVXmemmove(SB)

				// but not the two instructions that led to them being combined here.  For example
				// (CMPBconstload c (ADDQ x y)) -> (CMPBconstloadidx1 c x y) -> (CMPB c (MOVBloadidx1 x y))
				// The final pair of instructions turns out to be notably faster, at least in some benchmarks.
				f.Config.splitLoad(v)
			}
		}
	}
}

	// Clear the upper bits to get to a clean state. See issue #37174.
	// It is safe here as Go code don't use the upper bits of Y registers.
	p("#ifdef GOOS_darwin")
	p("#ifndef hasAVX")
	p("CMPB internal∕cpu·X86+const_offsetX86HasAVX(SB), $0")
	p("JE 2(PC)")
	p("#endif")
	p("VZEROUPPER")
	p("#endif")

	lSSE.save()
	p("CALL ·asyncPreempt2(SB)")
	lSSE.restore()
	l.restore()