arm64.AFCMPS, arm64.AFCMPD,
		arm64.AFCMPES, arm64.AFCMPED:
		return true
	}
	return false
}

// IsARM64STLXR reports whether the op (as defined by an arm64.A*
// constant) is one of the STLXR-like instructions that require special
// handling.
func IsARM64STLXR(op obj.As) bool {
	switch op {
	case arm64.ASTLXRB, arm64.ASTLXRH, arm64.ASTLXRW, arm64.ASTLXR,

	STLXP	(R6, R11), (RSP), R6                             // ERROR "constrained unpredictable behavior"
	STXP	(R6, R11), (R2), R2                              // ERROR "constrained unpredictable behavior"
	STLXR	R3, (RSP), R3                                    // ERROR "constrained unpredictable behavior"
	STXR	R3, (R4), R4                                     // ERROR "constrained unpredictable behavior"

			rno := uint16(r)
			if rno <= uint16(WZR) {
				op += "W"
			}
		}
		args[0], args[1] = args[1], args[0]

	case STLRB, STLRH:
		args[0], args[1] = args[1], args[0]

	case STLXR, STXR:
		if r, ok := inst.Args[1].(Reg); ok {
			rno := uint16(r)
			if rno <= uint16(WZR) {
				op += "W"
			}
		}
		args[1], args[2] = args[2], args[1]

	case STLXRB, STLXRH, STXRB, STXRH:

	STLRW R16, (R22)                           // d0fe9f88
	STLR R3, (R24)                             // 03ff9fc8
	STLRB R11, (R22)                           // cbfe9f08
	STLRH R16, (R23)                           // f0fe9f48
	STLXR R7, (R27), R8                        // 67ff08c8
	STLXRW R13, (R15), R14                     // edfd0e88
	STLXRB R24, (R23), R8                      // f8fe0808
	STLXRH R19, (R27), R11                     // 73ff0b48