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src/cmd/asm/internal/arch/arch.go
register["A7"] = riscv.REG_A7 register["S2"] = riscv.REG_S2 register["S3"] = riscv.REG_S3 register["S4"] = riscv.REG_S4 register["S5"] = riscv.REG_S5 register["S6"] = riscv.REG_S6 register["S7"] = riscv.REG_S7 register["S8"] = riscv.REG_S8 register["S9"] = riscv.REG_S9 register["S10"] = riscv.REG_S10 // Skip S11 as it is the g register. register["T3"] = riscv.REG_T3 register["T4"] = riscv.REG_T4
Created: Tue Apr 07 11:13:11 GMT 2026 - Last Modified: Fri Mar 20 17:02:17 GMT 2026 - 22K bytes - Click Count (0)