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Results 1 - 9 of 9 for R6 (0.01 sec)

  1. src/cmd/asm/internal/asm/testdata/arm64error.s

    	LDADDALW	R5, (R6), RSP                            // ERROR "illegal combination"
    	LDADDALH	R5, (R6), RSP                            // ERROR "illegal combination"
    	LDADDALB	R5, (R6), RSP                            // ERROR "illegal combination"
    	LDADDD	R5, (R6), RSP                                    // ERROR "illegal combination"
    	LDADDW	R5, (R6), RSP                                    // ERROR "illegal combination"
    Registered: Tue Nov 05 11:13:11 UTC 2024
    - Last Modified: Fri Dec 08 03:28:17 UTC 2023
    - 37.8K bytes
    - Viewed (0)
  2. src/cmd/asm/internal/asm/testdata/loong64enc1.s

    	SRLV	R4, R5, R6 		// a6101900
    	SRLV	$4, R4, R5		// 85104500
    	SRLV	$4, R4			// 84104500
    	SRLV	$32, R4, R5 		// 85804500
    	SRLV	$32, R4			// 84804500
    
    	MASKEQZ	R4, R5, R6		// a6101300
    	MASKNEZ	R4, R5, R6		// a6901300
    
    	// CRC32
    	CRCWBW	R4, R5, R6		// a6102400
    	CRCWHW	R4, R5, R6		// a6902400
    	CRCWWW	R4, R5, R6		// a6102500
    	CRCWVW	R4, R5, R6		// a6902500
    	CRCCWBW	R4, R5, R6		// a6102600
    Registered: Tue Nov 05 11:13:11 UTC 2024
    - Last Modified: Sat Nov 02 01:36:19 UTC 2024
    - 11.6K bytes
    - Viewed (0)
  3. src/cmd/asm/internal/asm/testdata/s390x.s

    	SUBW	R3, R4, R5            // b9f93054
    	SUBW	$8192, R1             // c21500002000
    	SUBW	$8192, R1, R2         // 1821c22500002000
    	MULLW	R6, R7                // b91c0076
    	MULLW	R6, R7, R8            // b9040087b91c0086
    	MULLW	$8192, R6             // a76c2000
    	MULLW	$8192, R6, R7         // 1876a77c2000
    	MULLW	$-32769, R8           // c281ffff7fff
    	MULLW   $-32769, R8, R9       // 1898c291ffff7fff
    Registered: Tue Nov 05 11:13:11 UTC 2024
    - Last Modified: Wed Sep 18 15:49:24 UTC 2024
    - 22.1K bytes
    - Viewed (0)
  4. src/cmd/asm/internal/asm/testdata/arm64enc.s

    	SUBSW R2.SXTH<<3, R13, R6                  // a6ad226b
    	SUBS R21.UXTX<<2, R27, R4                  // 646b35eb
    	SUBSW $(44<<12), R6, R9                    // SUBSW $180224, R6, R9         // c9b04071
    	SUBS $(1804<<12), R13, R9                  // SUBS $7389184, R13, R9        // a9315cf1
    	SUBSW R22->28, R6, R7                      // c770966b
    	SUBSW R22>>28, R6, R7                      // c770566b
    Registered: Tue Nov 05 11:13:11 UTC 2024
    - Last Modified: Mon Jul 24 01:11:41 UTC 2023
    - 43.9K bytes
    - Viewed (0)
  5. src/cmd/asm/internal/asm/operand_test.go

    	{"R2", "R2"},
    	{"R3", "R3"},
    	{"R4", "R4"},
    	{"R(4)", "R4"},
    	{"R5", "R5"},
    	{"R6", "R6"},
    	{"R7", "R7"},
    	{"R8", "R8"},
    	{"[R0,R1,g,R15]", "[R0,R1,g,R15]"},
    	{"[R0-R7]", "[R0,R1,R2,R3,R4,R5,R6,R7]"},
    	{"[R(0)-R(7)]", "[R0,R1,R2,R3,R4,R5,R6,R7]"},
    	{"[R0]", "[R0]"},
    	{"[R1-R12]", "[R1,R2,R3,R4,R5,R6,R7,R8,R9,g,R11,R12]"},
    	{"armCAS64(SB)", "armCAS64(SB)"},
    	{"asmcgocall<>(SB)", "asmcgocall<>(SB)"},
    Registered: Tue Nov 05 11:13:11 UTC 2024
    - Last Modified: Tue Aug 29 18:31:05 UTC 2023
    - 23.9K bytes
    - Viewed (0)
  6. src/cmd/asm/internal/asm/testdata/mips64.s

    	SLLV	R10, R22, R21	// 0156a814
    	SRL	R27, R6, R17	// 03668806
    	SRLV	R27, R6, R17	// 03668816
    	SRA	R11, R19, R20	// 0173a007
    	SRAV	R20, R19, R19	// 02939817
    	ROTR	R19, R18, R20	// 0272a046
    	ROTRV	R9, R13, R16	// 012d8056
    
    //	LSHW rreg ',' rreg
    //	{
    //		outcode(int($1), &$2, 0, &$4);
    //	}
    	SLL	R1, R2		// 00221004
    	SLLV	R10, R22	// 0156b014
    	SRL	R27, R6   	// 03663006
    	SRLV	R27, R6   	// 03663016
    Registered: Tue Nov 05 11:13:11 UTC 2024
    - Last Modified: Tue Aug 08 12:17:12 UTC 2023
    - 12.4K bytes
    - Viewed (0)
  7. src/cmd/asm/internal/asm/testdata/ppc64_p10.s

    	PLXSD 1234(R1), $0, V1                  // 04000000a82104d2
    	PLXSSP 5(R1), $0, V2                    // 04000000ac410005
    	PLXSSP 5(R0), $1, V2                    // 04100000ac400005
    	PLXV 12346891(R6), $1, VS44             // 041000bccd86660b
    	PLXVP 12345678(R4), $1, VS4             // 041000bce884614e
    	PMXVBF16GER2 VS1, VS2, $1, $2, $3, A1   // 0790c012ec811198
    	PMXVBF16GER2NN VS1, VS2, $1, $2, $3, A1 // 0790c012ec811790
    Registered: Tue Nov 05 11:13:11 UTC 2024
    - Last Modified: Thu Mar 23 20:52:57 UTC 2023
    - 14.3K bytes
    - Viewed (0)
  8. src/cmd/asm/internal/asm/testdata/armerror.s

    	MOVW.S	R3, CPSR           // ERROR "invalid .S suffix"
    	MOVW.S	$0, CPSR           // ERROR "invalid .S suffix"
    	MOVM.S	(R0), [R2-R4]      // ERROR "invalid .S suffix"
    	MOVM.S	[R1-R6], (R9)      // ERROR "invalid .S suffix"
    	SWPW.S	R1, (R2), R3       // ERROR "invalid .S suffix"
    	MOVF.S	(R0), F1           // ERROR "invalid .S suffix"
    	MOVF.S	F9, (R4)           // ERROR "invalid .S suffix"
    Registered: Tue Nov 05 11:13:11 UTC 2024
    - Last Modified: Wed Oct 23 15:18:14 UTC 2024
    - 14.5K bytes
    - Viewed (0)
  9. doc/asm.html

    to a <code>NOP</code> instruction).
    </p>
    
    <p>
    Addressing modes:
    </p>
    
    <ul>
    
    <li>
    <code>(R5)(R6*1)</code>: The location at <code>R5</code> plus <code>R6</code>.
    It is a scaled mode as on the x86, but the only scale allowed is <code>1</code>.
    </li>
    
    </ul>
    
    <h3 id="mips">MIPS, MIPS64</h3>
    
    <p>
    Registered: Tue Nov 05 11:13:11 UTC 2024
    - Last Modified: Tue Nov 28 19:15:27 UTC 2023
    - 36.3K bytes
    - Viewed (0)
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