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Results 1 - 8 of 8 for MOVWF (0.32 sec)
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src/cmd/asm/internal/asm/testdata/armerror.s
MOVDW R1, R2 // ERROR "illegal combination" MOVWF R1, R2 // ERROR "illegal combination" MOVWD R1, R2 // ERROR "illegal combination" MOVWD CPSR, R2 // ERROR "illegal combination" MOVWF CPSR, R2 // ERROR "illegal combination" MOVWD R1, CPSR // ERROR "illegal combination" MOVWF R1, CPSR // ERROR "illegal combination"
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Fri Nov 03 14:06:21 UTC 2017 - 14.4K bytes - Viewed (0) -
src/cmd/vendor/golang.org/x/arch/arm/armasm/plan9x.go
{VMOV_EQ, []int{1, 0}, "VMOV", "MOVW"}, {VCVT_EQ_F64_F32, []int{1, 0}, "VCVT", "MOVFD"}, {VCVT_EQ_F32_F64, []int{1, 0}, "VCVT", "MOVDF"}, {VCVT_EQ_F32_U32, []int{1, 0}, "VCVT", "MOVWF.U"}, {VCVT_EQ_F32_S32, []int{1, 0}, "VCVT", "MOVWF"}, {VCVT_EQ_S32_F32, []int{1, 0}, "VCVT", "MOVFW"}, {VCVT_EQ_U32_F32, []int{1, 0}, "VCVT", "MOVFW.U"}, {VCVT_EQ_F64_U32, []int{1, 0}, "VCVT", "MOVWD.U"},
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Thu Oct 19 23:33:33 UTC 2023 - 11.9K bytes - Viewed (0) -
src/cmd/compile/internal/ssa/_gen/MIPSOps.go
{name: "CMOVZzero", argLength: 2, reg: regInfo{inputs: []regMask{gp, gpg}, outputs: []regMask{gp}}, asm: "CMOVZ", resultInArg0: true}, {name: "MOVWF", argLength: 1, reg: fp11, asm: "MOVWF"}, // int32 -> float32 {name: "MOVWD", argLength: 1, reg: fp11, asm: "MOVWD"}, // int32 -> float64 {name: "TRUNCFW", argLength: 1, reg: fp11, asm: "TRUNCFW"}, // float32 -> int32
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Wed May 24 14:43:03 UTC 2023 - 24K bytes - Viewed (0) -
src/cmd/compile/internal/ssa/_gen/ARMOps.go
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Fri Feb 24 00:21:13 UTC 2023 - 41K bytes - Viewed (0) -
src/cmd/compile/internal/ssa/_gen/LOONG64Ops.go
{name: "MOVVnop", argLength: 1, reg: regInfo{inputs: []regMask{gp}, outputs: []regMask{gp}}, resultInArg0: true}, // nop, return arg0 in same register {name: "MOVWF", argLength: 1, reg: fp11, asm: "MOVWF"}, // int32 -> float32 {name: "MOVWD", argLength: 1, reg: fp11, asm: "MOVWD"}, // int32 -> float64 {name: "MOVVF", argLength: 1, reg: fp11, asm: "MOVVF"}, // int64 -> float32
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Tue Nov 21 19:04:19 UTC 2023 - 25.2K bytes - Viewed (0) -
src/cmd/compile/internal/ssa/_gen/MIPS64Ops.go
{name: "MOVVnop", argLength: 1, reg: regInfo{inputs: []regMask{gp}, outputs: []regMask{gp}}, resultInArg0: true}, // nop, return arg0 in same register {name: "MOVWF", argLength: 1, reg: fp11, asm: "MOVWF"}, // int32 -> float32 {name: "MOVWD", argLength: 1, reg: fp11, asm: "MOVWD"}, // int32 -> float64 {name: "MOVVF", argLength: 1, reg: fp11, asm: "MOVVF"}, // int64 -> float32
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Wed May 24 03:36:31 UTC 2023 - 25.5K bytes - Viewed (0) -
src/cmd/compile/internal/ssa/_gen/LOONG64.rules
(SignExt16to32 ...) => (MOVHreg ...) (SignExt8to64 ...) => (MOVBreg ...) (SignExt16to64 ...) => (MOVHreg ...) (SignExt32to64 ...) => (MOVWreg ...) // float <=> int conversion (Cvt32to32F ...) => (MOVWF ...) (Cvt32to64F ...) => (MOVWD ...) (Cvt64to32F ...) => (MOVVF ...) (Cvt64to64F ...) => (MOVVD ...) (Cvt32Fto32 ...) => (TRUNCFW ...) (Cvt64Fto32 ...) => (TRUNCDW ...) (Cvt32Fto64 ...) => (TRUNCFV ...)
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Tue Nov 21 19:26:25 UTC 2023 - 31.8K bytes - Viewed (0) -
src/cmd/compile/internal/ssa/_gen/MIPS64.rules
(SignExt16to32 ...) => (MOVHreg ...) (SignExt8to64 ...) => (MOVBreg ...) (SignExt16to64 ...) => (MOVHreg ...) (SignExt32to64 ...) => (MOVWreg ...) // float <=> int conversion (Cvt32to32F ...) => (MOVWF ...) (Cvt32to64F ...) => (MOVWD ...) (Cvt64to32F ...) => (MOVVF ...) (Cvt64to64F ...) => (MOVVD ...) (Cvt32Fto32 ...) => (TRUNCFW ...) (Cvt64Fto32 ...) => (TRUNCDW ...) (Cvt32Fto64 ...) => (TRUNCFV ...)
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Mon Jul 31 03:59:48 UTC 2023 - 41.9K bytes - Viewed (0)