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Results 1 - 4 of 4 for B16 (0.33 sec)

  2. github.com/golang/go

    src/cmd/asm/internal/asm/testdata/arm64error.s 

    	VLD1	(R8)(R13), [V2.B16]                              // ERROR "illegal combination"
	VLD1	8(R9), [V2.B16]                                  // ERROR "illegal combination"
	VST1	[V1.B16], (R8)(R13)                              // ERROR "illegal combination"
	VST1	[V1.B16], 9(R2)                                  // ERROR "illegal combination"
	VLD1	8(R8)(R13), [V2.B16]                             // ERROR "illegal combination"
    Registered: Tue Sep 09 11:13:09 UTC 2025
    - Last Modified: Wed Mar 26 10:48:50 UTC 2025
    - 37.9K bytes
    - Viewed (0)
  3. github.com/golang/go

    src/cmd/asm/internal/asm/testdata/arm64enc.s 

    	AESD V22.B16, V19.B16                                       // d35a284e
	AESE V31.B16, V29.B16                                       // fd4b284e
	AESIMC V12.B16, V27.B16                                     // 9b79284e
	AESMC V14.B16, V28.B16                                      // dc69284e
	VAND V4.B16, V4.B16, V9.B16                                 // 891c244e
    Registered: Tue Sep 09 11:13:09 UTC 2025
    - Last Modified: Mon Jul 24 01:11:41 UTC 2023
    - 43.9K bytes
    - Viewed (0)
  4. github.com/golang/go

    src/cmd/asm/internal/arch/arm64.go 

    		switch ext {
		case "B8":
			if isIndex {
				return errors.New("invalid register extension")
			}
			a.Reg = arm64.REG_ARNG + (reg & 31) + ((arm64.ARNG_8B & 15) << 5)
		case "B16":
			if isIndex {
				return errors.New("invalid register extension")
			}
			a.Reg = arm64.REG_ARNG + (reg & 31) + ((arm64.ARNG_16B & 15) << 5)
		case "H4":
			if isIndex {
    Registered: Tue Sep 09 11:13:09 UTC 2025
    - Last Modified: Fri Feb 14 15:13:11 UTC 2025
    - 10.3K bytes
    - Viewed (0)
  5. github.com/golang/go

    src/cmd/asm/internal/asm/testdata/loong64enc1.s 

    	//Move vector element to vector.
	VMOVQ		V1.B[3], V9.B16 // 298cf772
	VMOVQ		V2.H[2], V8.H8  // 48c8f772
	VMOVQ		V3.W[1], V7.W4  // 67e4f772
	VMOVQ		V4.V[0], V6.V2  // 86f0f772

	// Load data from memory and broadcast to each element of a vector register: VMOVQ    offset(Rj), <Vd>.<T>
	VMOVQ		(R4), V0.B16	// 80008030
	VMOVQ		1(R4), V0.B16	// 80048030
	VMOVQ		-3(R4), V0.B16	// 80f4bf30
	VMOVQ		(R4), V1.H8	// 81004030
    Registered: Tue Sep 09 11:13:09 UTC 2025
    - Last Modified: Thu Sep 04 19:24:25 UTC 2025
    - 35.5K bytes
    - Viewed (0)
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