MOVB	X5, tls(SB)				// b70f00009b8f0f00b38f4f0023805f00

	// NOT pseudo-instruction
	NOT	X5					// 93c2f2ff
	NOT	X5, X6					// 13c3f2ff

	// NEG/NEGW pseudo-instructions
	NEG	X5					// b3025040
	NEG	X5, X6					// 33035040
	NEGW	X5					// bb025040
	NEGW	X5, X6					// 3b035040

	// This jumps to the second instruction in the function (the
	// first instruction is an invisible stack pointer adjustment).

(MOVBUreg x:(Select0 (LoweredAtomicCas64 _ _ _ _))) => (MOVDreg x)

// Avoid sign extension after word arithmetic.
(MOVWreg x:(ADDIW   _)) => (MOVDreg x)
(MOVWreg x:(SUBW  _ _)) => (MOVDreg x)
(MOVWreg x:(NEGW    _)) => (MOVDreg x)
(MOVWreg x:(MULW  _ _)) => (MOVDreg x)
(MOVWreg x:(DIVW  _ _)) => (MOVDreg x)
(MOVWreg x:(DIVUW _ _)) => (MOVDreg x)
(MOVWreg x:(REMW  _ _)) => (MOVDreg x)
(MOVWreg x:(REMUW _ _)) => (MOVDreg x)

		{name: "NEG", argLength: 1, reg: gp11, asm: "NEG"},                    // -arg0
		{name: "NEGW", argLength: 1, reg: gp11, asm: "NEGW"},                  // -arg0 of 32 bits, sign extended to 64 bits
		{name: "SUB", argLength: 2, reg: gp21, asm: "SUB"},                    // arg0 - arg1