case MADD, MSUB, SMADDL, SMSUBL, UMADDL, UMSUBL:
		if r, ok := inst.Args[0].(Reg); ok {
			rno := uint16(r)
			if rno <= uint16(WZR) {
				op += "W"
			}
		}
		args[2], args[3] = args[3], args[2]
	case STLR:
		if r, ok := inst.Args[0].(Reg); ok {
			rno := uint16(r)
			if rno <= uint16(WZR) {
				op += "W"
			}
		}
		args[0], args[1] = args[1], args[0]

	case STLRB, STLRH:

	SMULH R17, R21, R21                        // b57e519b
	SMULL R0, R5, R0                           // a07c209b
	SMC $37977                                 // 238b12d4
	STLRW R16, (R22)                           // d0fe9f88
	STLR R3, (R24)                             // 03ff9fc8
	STLRB R11, (R22)                           // cbfe9f08
	STLRH R16, (R23)                           // f0fe9f48
	STLXR R7, (R27), R8                        // 67ff08c8