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src/math/big/arith_ppc64x.s
ADD $-2, R4, R16 PCALIGN $16 loopback: ADD $-1, R8, R10 SLD $3, R10 LXVD2X (R6)(R10), VS32 // load x[i-1], x[i] SLD $3, R8, R12 LXVD2X (R6)(R12), VS33 // load x[i], x[i+1] VSRD V0, V4, V3 // x[i-1]>>s, x[i]>>s VSLD V1, V2, V5 // x[i]<<ŝ, x[i+1]<<ŝ VOR V3, V5, V5 // Or(|) the two registers together STXVD2X VS37, (R3)(R10) // store into z[i-1] and z[i]
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