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Results 1 - 10 of 72 for DRconv (0.26 sec)
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src/cmd/internal/obj/ppc64/asm_test.go
} for i := range ctxts { if output := ctxts[i].aclass(&tst.arg); output != expect[i] { t.Errorf("%s.aclass(%v) = %v, expected %v\n", name[i], tst.arg, DRconv(output), DRconv(expect[i])) } } } } // The optab size should remain constant when reinitializing the PPC64 assembler backend. func TestOptabReinit(t *testing.T) { buildcfg.GOOS = "linux"
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Fri Feb 09 22:14:57 UTC 2024 - 17.3K bytes - Viewed (0) -
src/cmd/internal/obj/util.go
// as long as they register proper cconv function for it. type opSuffixSet struct { arch string cconv func(suffix uint8) string } var opSuffixSpace []opSuffixSet // RegisterOpSuffix assigns cconv function for formatting opcode suffixes // when compiling for GOARCH=arch. // // cconv is never called with 0 argument. func RegisterOpSuffix(arch string, cconv func(uint8) string) {
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Wed May 15 15:44:14 UTC 2024 - 17.5K bytes - Viewed (0) -
tensorflow/compiler/mlir/lite/tests/quantize-dynamic-range.mlir
// CHECK: %[[conv:.*]] = "tfl.conv_2d"(%arg0, %[[w3]], %[[b]]) // CHECK: %[[dconv:.*]] = "tfl.depthwise_conv_2d"(%arg0, %[[w2]], %[[b]]) // CHECK: %[[emb:.*]] = "tfl.gather"(%[[dq_w1]], %arg1) // CHECK: %[[bmm:.*]] = "tfl.batch_matmul"(%[[conv]], %[[dconv]]) <{adj_x = false, adj_y = true // CHECK-NOT: , asymmetric_quantize_inputs = true // CHECK-SAME: }
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Thu May 23 21:09:00 UTC 2024 - 23.2K bytes - Viewed (0) -
tensorflow/compiler/mlir/lite/tests/quantize-numeric-verify.mlir
func.return %10 : tensor<?x1x1x3xf32> // MODEL-DEBUG: %[[f_conv:.*]] = "tfl.conv_2d"{{.*}}xf32 // MODEL-DEBUG: %[[q_conv:.*]] = "tfl.conv_2d"{{.*}}x!quant // MODEL-DEBUG:"tfl.NumericVerify"(%[[q_conv]], %[[f_conv]]) // MODEL-DEBUG: %[[dq0:.*]] = "tfl.dequantize"(%[[q_conv]]) // MODEL-DEBUG: %[[f_sqrt1:.*]] = "tfl.sqrt"(%[[f_conv]] // MODEL-DEBUG: %[[q_sqrt1:.*]] = "tfl.sqrt"(%[[dq0]]
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Thu May 02 09:41:17 UTC 2024 - 15.1K bytes - Viewed (0) -
tensorflow/compiler/mlir/lite/tests/prepare-quantize-dynamic-range.mlir
// CHECK-DAG: %[[dq_w1:.*]] = "tfl.dequantize"(%[[q_w1]]) // CHECK-DAG: %[[dq_w2:.*]] = "tfl.dequantize"(%[[q_w2]]) // CHECK: %[[conv:.*]] = "tfl.conv_2d"(%arg0, %[[dq_w2]], %[[b]]) // CHECK: %[[dconv:.*]] = "tfl.depthwise_conv_2d"(%arg0, %[[dq_w1]], %[[b]]) // CHECK: %[[bmm:.*]] = "tfl.batch_matmul"(%[[conv]], %[[dconv]]) <{adj_x = false, adj_y = true // CHECK-NOT: , asymmetric_quantize_inputs = true // CHECK-SAME: } // CHECK: return %[[bmm:.*]]
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Thu May 02 09:41:17 UTC 2024 - 38.2K bytes - Viewed (0) -
src/cmd/compile/internal/types/fmt.go
if verb == 'v' && f.Flag('+') { mode = fmtDebug } fmt.Fprint(f, sconv(s, verb, mode)) default: fmt.Fprintf(f, "%%!%c(*types.Sym=%p)", verb, s) } } func (s *Sym) String() string { return sconv(s, 0, fmtGo) } // See #16897 for details about performance implications // before changing the implementation of sconv. func sconv(s *Sym, verb rune, mode fmtMode) string { if verb == 'L' { panic("linksymfmt")
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Tue Sep 12 15:41:17 UTC 2023 - 15.7K bytes - Viewed (0) -
src/cmd/compile/internal/walk/convert.go
init.Append(as) return res } // Returns the data word (the second word) used to represent conv.X in // an interface. func dataWord(conv *ir.ConvExpr, init *ir.Nodes) ir.Node { pos, n := conv.Pos(), conv.X fromType := n.Type() // If it's a pointer, it is its own representation. if types.IsDirectIface(fromType) { return n }
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Mon Oct 09 17:28:22 UTC 2023 - 18.2K bytes - Viewed (0) -
src/cmd/compile/internal/walk/builtin.go
return mkcall("countrunes", n.Type(), init, typecheck.Conv(n.X.(*ir.ConvExpr).X, types.Types[types.TSTRING])) } if isByteCount(n) { conv := n.X.(*ir.ConvExpr) walkStmtList(conv.Init()) init.Append(ir.TakeInit(conv)...) _, len := backingArrayPtrLen(cheapExpr(conv.X, init)) return len } if isChanLenCap(n) { name := "chanlen" if n.Op() == ir.OCAP {
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Fri Mar 08 22:35:22 UTC 2024 - 31.2K bytes - Viewed (0) -
tensorflow/compiler/mlir/lite/tests/dilated-conv.mlir
// CHECK-NEXT: [[CONV:%.*]] = "tf.Conv2D"([[INPUT]], [[FILTER]]) <{dilations = [1, 2, 2, 1], padding = "SAME", strides = [1, 1, 1, 1]}> : (tensor<1x128x128x3xf32>, tensor<5x5x3x8xf32>) -> tensor<1x128x128x8xf32> // CHECK-NEXT: [[RESULT:%.*]] = "tf.BiasAdd"([[CONV]], [[BIAS]]) : (tensor<1x128x128x8xf32>, tensor<8xf32>) -> tensor<1x128x128x8xf32>
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Mon Oct 30 06:52:55 UTC 2023 - 44.7K bytes - Viewed (0) -
src/cmd/asm/internal/arch/arch.go
for i := ppc64.REG_R0; i <= ppc64.REG_R31; i++ { register[obj.Rconv(i)] = int16(i) } for i := ppc64.REG_F0; i <= ppc64.REG_F31; i++ { register[obj.Rconv(i)] = int16(i) } for i := ppc64.REG_V0; i <= ppc64.REG_V31; i++ { register[obj.Rconv(i)] = int16(i) } for i := ppc64.REG_VS0; i <= ppc64.REG_VS63; i++ { register[obj.Rconv(i)] = int16(i) } for i := ppc64.REG_A0; i <= ppc64.REG_A7; i++ {
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Tue Mar 21 06:51:28 UTC 2023 - 21.3K bytes - Viewed (0)