fdiv - Code Search

src/cmd/vendor/golang.org/x/arch/x86/x86asm/gnu.go

		if reg1 && reg2 && (inst.Opcode>>24 == 0xDC || inst.Opcode>>24 == 0xDE) {
			switch inst.Op {
			case FDIV:
				inst.Op = FDIVR
			case FDIVR:
				inst.Op = FDIV
			case FSUB:
				inst.Op = FSUBR
			case FSUBR:
				inst.Op = FSUB
			case FDIVP:
				inst.Op = FDIVRP
			case FDIVRP:
				inst.Op = FDIVP
			case FSUBP:
				inst.Op = FSUBRP
			case FSUBRP:
				inst.Op = FSUBP
			}
		}

Registered: Wed Jun 12 16:32:35 UTC 2024

- Last Modified: Thu Oct 19 23:33:33 UTC 2023

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github.com/golang/go

src/cmd/asm/internal/asm/testdata/s390x.s

	FSUBS	F2, F13                // b30b00d2
	FSUB	F3, F12                // b31b00c3
	FMULS	F4, F11                // b31700b4
	FMUL	F5, F10                // b31c00a5
	FDIVS	F6, F9                 // b30d0096
	FDIV	F7, F8                 // b31d0087
	FABS	F1, F2                 // b3100021
	FSQRTS	F3, F4                 // b3140043
	FSQRT	F5, F15                // b31500f5
	FIEBR	$0, F0, F1             // b3570010

Registered: Wed Jun 12 16:32:35 UTC 2024

- Last Modified: Wed Nov 22 03:55:32 UTC 2023

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github.com/golang/go

src/cmd/compile/internal/ssa/_gen/PPC64Ops.go

		{name: "POPCNTB", argLength: 1, reg: gp11, asm: "POPCNTB"}, // number of set bits in each byte of arg0 placed in corresponding byte

		{name: "FDIV", argLength: 2, reg: fp21, asm: "FDIV"},   // arg0/arg1
		{name: "FDIVS", argLength: 2, reg: fp21, asm: "FDIVS"}, // arg0/arg1

		{name: "DIVD", argLength: 2, reg: gp21, asm: "DIVD", typ: "Int64"},   // arg0/arg1 (signed 64-bit)

Registered: Wed Jun 12 16:32:35 UTC 2024

- Last Modified: Wed May 22 19:59:38 UTC 2024

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github.com/golang/go

src/cmd/compile/internal/ssa/_gen/RISCV64.rules

(Mul32 ...) => (MULW ...)
(Mul16 x y) => (MULW (SignExt16to32 x) (SignExt16to32 y))
(Mul8 x y)  => (MULW (SignExt8to32 x)  (SignExt8to32 y))
(Mul(64|32)F ...) => (FMUL(D|S) ...)

(Div(64|32)F ...) => (FDIV(D|S) ...)

(Div64 x y [false])  => (DIV x y)
(Div64u ...) => (DIVU ...)
(Div32 x y [false])  => (DIVW x y)
(Div32u ...) => (DIVUW ...)
(Div16 x y [false])  => (DIVW  (SignExt16to32 x) (SignExt16to32 y))

Registered: Wed Jun 12 16:32:35 UTC 2024

- Last Modified: Thu Mar 07 14:57:07 UTC 2024

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github.com/golang/go

src/cmd/compile/internal/ssa/_gen/RISCV64Ops.go

		{name: "FMULS", argLength: 2, reg: fp21, asm: "FMULS", commutative: true, typ: "Float32"},                                           // arg0 * arg1
		{name: "FDIVS", argLength: 2, reg: fp21, asm: "FDIVS", commutative: false, typ: "Float32"},                                          // arg0 / arg1

Registered: Wed Jun 12 16:32:35 UTC 2024

- Last Modified: Thu Mar 07 14:57:07 UTC 2024

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github.com/golang/go

src/cmd/internal/obj/arm/obj5.go

	cursym.Func().Args = p.To.Val.(int32)

	/*
	 * find leaf subroutines
	 */
	for p := cursym.Func().Text; p != nil; p = p.Link {
		switch p.As {
		case obj.ATEXT:
			p.Mark |= LEAF

		case ADIV, ADIVU, AMOD, AMODU:
			cursym.Func().Text.Mark &^= LEAF

		case ABL,
			ABX,
			obj.ADUFFZERO,
			obj.ADUFFCOPY:
			cursym.Func().Text.Mark &^= LEAF
		}
	}

	var q2 *obj.Prog

Registered: Wed Jun 12 16:32:35 UTC 2024

- Last Modified: Mon Nov 20 17:19:36 UTC 2023

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github.com/golang/go

src/cmd/internal/obj/s390x/a.out.go

	AROSBGT
	ARISBG
	ARISBGN
	ARISBGZ
	ARISBGNZ
	ARISBHG
	ARISBLG
	ARISBHGZ
	ARISBLGZ

	// floating point
	AFABS
	AFADD
	AFADDS
	AFCMPO
	AFCMPU
	ACEBR
	AFDIV
	AFDIVS
	AFMADD
	AFMADDS
	AFMOVD
	AFMOVS
	AFMSUB
	AFMSUBS
	AFMUL
	AFMULS
	AFNABS
	AFNEG
	AFNEGS
	ALEDBR
	ALDEBR
	ALPDFR
	ALNDFR
	AFSUB
	AFSUBS
	AFSQRT

Registered: Wed Jun 12 16:32:35 UTC 2024

- Last Modified: Tue Sep 05 16:41:03 UTC 2023

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github.com/golang/go

src/cmd/internal/obj/riscv/cpu.go

	AADDW
	ASLLW
	ASRLW
	ASUBW
	ASRAW

	// 5.3: Load and Store Instructions (RV64I)
	ALD
	ASD

	// 7.1: Multiplication Operations
	AMUL
	AMULH
	AMULHU
	AMULHSU
	AMULW
	ADIV
	ADIVU
	AREM
	AREMU
	ADIVW
	ADIVUW
	AREMW
	AREMUW

	// 8.2: Load-Reserved/Store-Conditional Instructions
	ALRD
	ASCD
	ALRW
	ASCW

	// 8.3: Atomic Memory Operations

Registered: Wed Jun 12 16:32:35 UTC 2024

- Last Modified: Wed Mar 20 14:19:33 UTC 2024

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github.com/golang/go

src/cmd/internal/obj/ppc64/a.out.go

	AEQV
	AEQVCC
	AEXTSB
	AEXTSBCC
	AEXTSH
	AEXTSHCC
	AFABS
	AFABSCC
	AFADD
	AFADDCC
	AFADDS
	AFADDSCC
	AFCMPO
	AFCMPU
	AFCTIW
	AFCTIWCC
	AFCTIWZ
	AFCTIWZCC
	AFDIV
	AFDIVCC
	AFDIVS
	AFDIVSCC
	AFMADD
	AFMADDCC
	AFMADDS
	AFMADDSCC
	AFMOVD
	AFMOVDCC
	AFMOVDU
	AFMOVS
	AFMOVSU
	AFMOVSX
	AFMOVSZ
	AFMSUB
	AFMSUBCC
	AFMSUBS

Registered: Wed Jun 12 16:32:35 UTC 2024

- Last Modified: Mon Apr 01 18:50:29 UTC 2024

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github.com/golang/go

src/cmd/asm/internal/asm/testdata/riscv64.s

	FSW	F0, 4(X5)				// 27a20200

	// 11.6: Single-Precision Floating-Point Computational Instructions
	FADDS	F1, F0, F2				// 53011000
	FSUBS	F1, F0, F2				// 53011008
	FMULS	F1, F0, F2				// 53011010
	FDIVS	F1, F0, F2				// 53011018
	FMINS	F1, F0, F2				// 53011028
	FMAXS	F1, F0, F2				// 53111028
	FSQRTS	F0, F1					// d3000058

	// 11.7: Single-Precision Floating-Point Conversion and Move Instructions

Registered: Wed Jun 12 16:32:35 UTC 2024

- Last Modified: Fri Mar 22 04:42:21 UTC 2024

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