Search Options

Results per page
Sort
Preferred Languages
Advance

Results 1 - 4 of 4 for FADD (6.4 sec)

  1. src/cmd/compile/internal/ssa/_gen/RISCV64.rules

    // Use of this source code is governed by a BSD-style
    // license that can be found in the LICENSE file.
    
    // Lowering arithmetic
    (Add(Ptr|64|32|16|8) ...) => (ADD ...)
    (Add(64|32)F ...) => (FADD(D|S) ...)
    
    (Sub(Ptr|64|32|16|8) ...) => (SUB ...)
    (Sub(64|32)F ...) => (FSUB(D|S) ...)
    
    (Mul64 ...) => (MUL  ...)
    (Mul64uhilo ...) => (LoweredMuluhilo ...)
    (Mul64uover ...) => (LoweredMuluover ...)
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Thu Mar 07 14:57:07 UTC 2024
    - 40.3K bytes
    - Viewed (0)
  2. src/cmd/asm/internal/asm/testdata/s390x.s

    	FMOVD	F0, 4096(R1)           // ed0010000167
    	FMOVS	F13, 4095(R2)(R3)      // 70d32fff
    	FMOVS	F13, 4096(R2)(R3)      // edd320000166
    
    	FADDS	F0, F15                // b30a00f0
    	FADD	F1, F14                // b31a00e1
    	FSUBS	F2, F13                // b30b00d2
    	FSUB	F3, F12                // b31b00c3
    	FMULS	F4, F11                // b31700b4
    	FMUL	F5, F10                // b31c00a5
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Wed Nov 22 03:55:32 UTC 2023
    - 21.6K bytes
    - Viewed (0)
  3. src/cmd/vendor/golang.org/x/arch/x86/x86asm/gnu.go

    	}
    	return ""
    }
    
    func argBytes(inst *Inst, arg Arg) int {
    	if isMem(arg) {
    		return inst.MemBytes
    	}
    	return regBytes(arg)
    }
    
    func isFloat(op Op) bool {
    	switch op {
    	case FADD, FCOM, FCOMP, FDIV, FDIVR, FIADD, FICOM, FICOMP, FIDIV, FIDIVR, FILD, FIMUL, FIST, FISTP, FISTTP, FISUB, FISUBR, FLD, FMUL, FST, FSTP, FSUB, FSUBR:
    		return true
    	}
    	return false
    }
    
    func isFloatInt(op Op) bool {
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Thu Oct 19 23:33:33 UTC 2023
    - 21.4K bytes
    - Viewed (0)
  4. src/cmd/compile/internal/ssa/_gen/PPC64Ops.go

    		{name: "ADDCCconst", argLength: 1, reg: gp11cxer, asm: "ADDCCC", aux: "Int64", typ: "(Int,Flags)"}, // arg0 + auxInt sets CC, clobbers XER
    		{name: "FADD", argLength: 2, reg: fp21, asm: "FADD", commutative: true},                            // arg0+arg1
    		{name: "FADDS", argLength: 2, reg: fp21, asm: "FADDS", commutative: true},                          // arg0+arg1
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Wed May 22 19:59:38 UTC 2024
    - 43.8K bytes
    - Viewed (0)
Back to top