Search Options

Results per page
Sort
Preferred Languages
Advance

Results 1 - 10 of 15 for vcmpuq (0.43 sec)

  1. src/internal/bytealg/compare_ppc64x.s

    	LXVLL	R6,R9,V4
    	VCMPUQ	V3,V4,CR0	// Compare as a 128b integer.
    	SETB_CR0(R6)
    	ISEL	CR0EQ,R3,R6,R3	// If equal, length determines the return value.
    	RET
    #else
    	CMP	R9,$8
    	BLT	cmp4
    	ANDCC	$7,R9,R9
    	_LDBEX	(R0)(R5),R10
    	_LDBEX	(R0)(R6),R11
    	_LDBEX	(R9)(R5),R12
    	_LDBEX	(R9)(R6),R14
    	CMPU	R10,R11,CR0
    	SETB_CR0(R5)
    	CMPU	R12,R14,CR1
    	SETB_CR1(R6)
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Mon Aug 28 17:33:20 UTC 2023
    - 6.7K bytes
    - Viewed (0)
  2. src/cmd/internal/obj/ppc64/anames.go

    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Mon Apr 01 18:50:29 UTC 2024
    - 6.7K bytes
    - Viewed (0)
  3. test/fixedbugs/issue43619.go

    		{fcmple, 1.0, 1.0, 123, 0},
    		{fcmpgt, 1.0, 1.0, 123, 123},
    		{fcmpge, 1.0, 1.0, 123, 0},
    		{fcmpeq, 1.0, 1.0, 123, 0},
    		{fcmpne, 1.0, 1.0, 123, 123},
    
    		{fcmplt, 1.0, 2.0, 123, 0},
    		{fcmple, 1.0, 2.0, 123, 0},
    		{fcmpgt, 1.0, 2.0, 123, 123},
    		{fcmpge, 1.0, 2.0, 123, 123},
    		{fcmpeq, 1.0, 2.0, 123, 123},
    		{fcmpne, 1.0, 2.0, 123, 0},
    
    		{fcmplt, 2.0, 1.0, 123, 123},
    		{fcmple, 2.0, 1.0, 123, 123},
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Thu Jan 14 17:23:11 UTC 2021
    - 2.2K bytes
    - Viewed (0)
  4. src/internal/bytealg/equal_amd64.s

    	PCALIGN $16
    bigloop:
    	CMPQ	BX, $8
    	JBE	leftover
    	MOVQ	(SI), CX
    	MOVQ	(DI), DX
    	ADDQ	$8, SI
    	ADDQ	$8, DI
    	SUBQ	$8, BX
    	CMPQ	CX, DX
    	JEQ	bigloop
    	XORQ	AX, AX	// return 0
    	RET
    
    	// remaining 0-8 bytes
    leftover:
    	MOVQ	-8(SI)(BX*1), CX
    	MOVQ	-8(DI)(BX*1), DX
    	CMPQ	CX, DX
    	SETEQ	AX
    	RET
    
    small:
    	CMPQ	BX, $0
    	JEQ	equal
    
    	LEAQ	0(BX*8), CX
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Fri Nov 17 16:34:40 UTC 2023
    - 2.8K bytes
    - Viewed (0)
  5. src/math/dim_s390x.s

    	CMPUBLT R4, R2, isMaxNaN
    	MOVD    R9, R3
    	AND     R5, R3 // y = |y|
    	CMPUBLT R4, R3, isMaxNaN
    	// ±0 special cases
    	OR      R3, R2
    	BEQ     isMaxZero
    
    	FMOVD   x+0(FP), F1
    	FMOVD   y+8(FP), F2
    	FCMPU   F2, F1
    	BGT     +3(PC)
    	FMOVD   F1, ret+16(FP)
    	RET
    	FMOVD   F2, ret+16(FP)
    	RET
    isMaxNaN: // return NaN
    	MOVD	$NaN, R4
    isPosInf: // return +Inf
    	MOVD    R4, ret+16(FP)
    	RET
    isMaxZero:
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Thu Apr 15 15:48:19 UTC 2021
    - 2K bytes
    - Viewed (0)
  6. src/internal/bytealg/count_arm64.s

    	VEOR	V7.B8, V7.B8, V7.B8
    	VEOR	V8.B8, V8.B8, V8.B8
    	PCALIGN $16
    	// Count the target byte in 32-byte chunk
    chunk_loop:
    	VLD1.P	(R0), [V1.B16, V2.B16]
    	CMP	R0, R3
    	VCMEQ	V0.B16, V1.B16, V3.B16
    	VCMEQ	V0.B16, V2.B16, V4.B16
    	// Clear the higher 7 bits
    	VAND	V5.B16, V3.B16, V3.B16
    	VAND	V5.B16, V4.B16, V4.B16
    	// Count lanes match the requested byte
    	VADDP	V4.B16, V3.B16, V6.B16 // 32B->16B
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Tue Oct 31 17:00:27 UTC 2023
    - 2K bytes
    - Viewed (0)
  7. test/codegen/fuse.go

    //   backward (predicted taken)
    
    // ---------------------------------- //
    // signed integer range (conjunction) //
    // ---------------------------------- //
    
    func si1c(c <-chan int64) {
    	// amd64:"CMPQ\t.+, [$]256"
    	// s390x:"CLGIJ\t[$]12, R[0-9]+, [$]255"
    	for x := <-c; x >= 0 && x < 256; x = <-c {
    	}
    }
    
    func si2c(c <-chan int32) {
    	// amd64:"CMPL\t.+, [$]256"
    	// s390x:"CLIJ\t[$]12, R[0-9]+, [$]255"
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Tue Mar 03 14:30:26 UTC 2020
    - 4.8K bytes
    - Viewed (0)
  8. src/math/floor_amd64.s

    TEXT ·archFloor(SB),NOSPLIT,$0
    	MOVQ	x+0(FP), AX
    	MOVQ	$~(1<<63), DX // sign bit mask
    	ANDQ	AX,DX // DX = |x|
    	SUBQ	$1,DX
    	MOVQ    $(Big - 1), CX // if |x| >= 2**52-1 or IsNaN(x) or |x| == 0, return x
    	CMPQ	DX,CX
    	JAE     isBig_floor
    	MOVQ	AX, X0 // X0 = x
    	CVTTSD2SQ	X0, AX
    	CVTSQ2SD	AX, X1 // X1 = float(int(x))
    	CMPSD	X1, X0, 1 // compare LT; X0 = 0xffffffffffffffff or 0
    	MOVSD	$(-1.0), X2
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Thu Apr 15 15:48:19 UTC 2021
    - 2K bytes
    - Viewed (0)
  9. src/runtime/time_linux_amd64.s

    	MOVQ	CX, m_vdsoPC(BX)
    	MOVQ	DX, m_vdsoSP(BX)
    
    	CMPQ	R14, m_curg(BX)	// Only switch if on curg.
    	JNE	noswitch
    
    	MOVQ	m_g0(BX), DX
    	MOVQ	(g_sched+gobuf_sp)(DX), SP	// Set SP to g0 stack
    
    noswitch:
    	SUBQ	$32, SP		// Space for two time results
    	ANDQ	$~15, SP	// Align for C code
    
    	MOVL	$0, DI // CLOCK_REALTIME
    	LEAQ	16(SP), SI
    	MOVQ	runtime·vdsoClockgettimeSym(SB), AX
    	CMPQ	AX, $0
    	JEQ	fallback
    	CALL	AX
    
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Sat Nov 06 10:24:44 UTC 2021
    - 2K bytes
    - Viewed (0)
  10. src/runtime/msan_amd64.s

    TEXT	msancall<>(SB), NOSPLIT, $0-0
    	get_tls(R12)
    	MOVQ	g(R12), R14
    	MOVQ	SP, R12		// callee-saved, preserved across the CALL
    	CMPQ	R14, $0
    	JE	call	// no g; still on a system stack
    
    	MOVQ	g_m(R14), R13
    	// Switch to g0 stack.
    	MOVQ	m_g0(R13), R10
    	CMPQ	R10, R14
    	JE	call	// already on g0
    
    	MOVQ	(g_sched+gobuf_sp)(R10), SP
    call:
    	ANDQ	$~15, SP	// alignment for gcc ABI
    	CALL	AX
    	MOVQ	R12, SP
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Tue Jan 09 01:36:54 UTC 2024
    - 2.3K bytes
    - Viewed (0)
Back to top