}
	if REG_A0 <= r && r <= REG_A7 {
		return fmt.Sprintf("A%d", r-REG_A0)
	}
	if r == REG_CR {
		return "CR"
	}
	if REG_SPR0 <= r && r <= REG_SPR0+1023 {
		switch r {
		case REG_XER:
			return "XER"

		case REG_LR:
			return "LR"

		case REG_CTR:
			return "CTR"
		}

		return fmt.Sprintf("SPR(%d)", r-REG_SPR0)
	}

	if r == REG_FPSCR {
		return "FPSCR"
	}

var limited1 = Map[int, byte](input, limiter)
var limited2 = Map(input, limiter) // using type inference

func reducer(x float64, y int) float64 {
	return x + float64(y)
}

var reduced1 = Reduce[int, float64](input, 0, reducer)
var reduced2 = Reduce(input, 1i, reducer) // using type inference
var reduced3 = Reduce(input, 1, reducer) // using type inference

func filter(x int) bool {
	return x&1 != 0
}

var limited2 = Map(input, limiter) // using type inference

func reducer(x float64, y int) float64 {
	return x + float64(y)
}

var reduced1 = Reduce[int, float64](input, 0, reducer)
var reduced2 = Reduce(input, 1i /* ERROR "overflows" */, reducer) // using type inference
var reduced3 = Reduce(input, 1, reducer) // using type inference

func filter(x int) bool {
	return x&1 != 0
}

  Location loc = body->getLoc();
  block->addArguments({type, type}, SmallVector<Location, 2>(2, loc));

  auto reducer =
      builder->create<Op>(loc, block->getArgument(0), block->getArgument(1));
  builder->create<ReturnOp>(loc, reducer.getResult());
}

ConstantOp GetScalarConstOfType(Type ty, Location loc, int64_t raw_value,
                                OpBuilder* builder);

  // CHECK-LABEL: func @main
  func.func @main() -> tensor<f32> {
    // CHECK-NEXT: %[[VAR:.*]] = "tf.VarHandleOp"
    // CHECK-NEXT: %[[READ_VAR:.*]] = "tf.ReadVariableOp"(%[[VAR]])
    // CHECK-NEXT: return %[[READ_VAR]]
    // CHECK-NOT: "tf.Cast"

==============================================================================*/

#include "mlir/IR/MLIRContext.h"  // from @llvm-project
#include "mlir/IR/PatternMatch.h"  // from @llvm-project
#include "mlir/Reducer/ReductionPatternInterface.h"  // from @llvm-project
#include "mlir/Tools/mlir-reduce/MlirReduceMain.h"  // from @llvm-project
#include "tensorflow/compiler/mlir/init_mlir.h"

// RUN: tf-reduce %s -reduction-tree='traversal-mode=0 test=%S/reducer/unsupported-op-test.sh' | FileCheck %s

// CHECK: @target_function
func.func @target_function() -> tensor<i32> {
  %0 = "tf_device.cluster"() ({
    // CHECK: tf.UnsupportedOp
    %1 = "tf.UnsupportedOp"() {value = dense<1> : tensor<i32>} : () -> tensor<i32>
    // CHECK: tf.Identity
    %2 = "tf.Identity"(%1) : (tensor<i32>) -> tensor<i32>
    // CHECK-NOT: tf.Identity

        "@llvm-project//llvm:FileCheck",
        "@llvm-project//llvm:not",
    ],
)

filegroup(
    name = "reducer_tester",
    testonly = True,
    srcs = glob(
        [
            "reducer/*.sh",
        ],
    ),
)

tf_cc_test(
    name = "xla_sharding_util_test",
    srcs = ["xla_sharding_util_test.cc"],
    deps = [
        "//tensorflow/compiler/mlir/tensorflow:xla_sharding_util",

	REG_DR3
	REG_DR4
	REG_DR5
	REG_DR6
	REG_DR7

	REG_TR0
	REG_TR1
	REG_TR2
	REG_TR3
	REG_TR4
	REG_TR5
	REG_TR6
	REG_TR7

	REG_TLS

	MAXREG

	REG_CR = REG_CR0
	REG_DR = REG_DR0
	REG_TR = REG_TR0

	REGARG       = -1
	REGRET       = REG_AX
	FREGRET      = REG_X0
	REGSP        = REG_SP
	REGCTXT      = REG_DX