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Results 1 - 10 of 35 for r26 (0.02 sec)
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src/runtime/duff_arm64.s
STP.P (R26, R27), 16(R21) LDP.P 16(R20), (R26, R27) STP.P (R26, R27), 16(R21) LDP.P 16(R20), (R26, R27) STP.P (R26, R27), 16(R21) LDP.P 16(R20), (R26, R27) STP.P (R26, R27), 16(R21) LDP.P 16(R20), (R26, R27) STP.P (R26, R27), 16(R21) LDP.P 16(R20), (R26, R27) STP.P (R26, R27), 16(R21) LDP.P 16(R20), (R26, R27) STP.P (R26, R27), 16(R21)
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Wed Jun 02 16:49:25 UTC 2021 - 5.3K bytes - Viewed (0) -
src/reflect/asm_arm64.s
// frame is specially handled in the runtime. See the comment above LOCAL_RETVALID. ADD $LOCAL_REGARGS, RSP, R20 CALL runtime·spillArgs(SB) MOVD R26, 32(RSP) // outside of moveMakeFuncArgPtrs's arg area MOVD R26, R0 MOVD R20, R1 CALL ·moveMakeFuncArgPtrs<ABIInternal>(SB) MOVD 32(RSP), R26 MOVD R26, 8(RSP) MOVD $argframe+0(FP), R3 MOVD R3, 16(RSP) MOVB $0, LOCAL_RETVALID(RSP) ADD $LOCAL_RETVALID, RSP, R3 MOVD R3, 24(RSP)
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Fri Mar 18 18:26:13 UTC 2022 - 2.8K bytes - Viewed (0) -
src/runtime/preempt_arm64.s
STP (R8, R9), 72(RSP) STP (R10, R11), 88(RSP) STP (R12, R13), 104(RSP) STP (R14, R15), 120(RSP) STP (R16, R17), 136(RSP) STP (R19, R20), 152(RSP) STP (R21, R22), 168(RSP) STP (R23, R24), 184(RSP) STP (R25, R26), 200(RSP) MOVD NZCV, R0 MOVD R0, 216(RSP) MOVD FPSR, R0 MOVD R0, 224(RSP) FSTPD (F0, F1), 232(RSP) FSTPD (F2, F3), 248(RSP) FSTPD (F4, F5), 264(RSP) FSTPD (F6, F7), 280(RSP) FSTPD (F8, F9), 296(RSP)
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Thu Mar 03 01:58:56 UTC 2022 - 2K bytes - Viewed (0) -
src/runtime/signal_loong64.go
print("r21 ", hex(c.r21()), "\n") print("r22 ", hex(c.r22()), "\t") print("r23 ", hex(c.r23()), "\n") print("r24 ", hex(c.r24()), "\t") print("r25 ", hex(c.r25()), "\n") print("r26 ", hex(c.r26()), "\t") print("r27 ", hex(c.r27()), "\n") print("r28 ", hex(c.r28()), "\t") print("r29 ", hex(c.r29()), "\n") print("r30 ", hex(c.r30()), "\t") print("r31 ", hex(c.r31()), "\n")
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Tue Mar 21 06:51:28 UTC 2023 - 3K bytes - Viewed (0) -
src/runtime/cgo/abi_arm64.h
STP (R21, R22), ((offset)+2*8)(RSP) \ STP (R23, R24), ((offset)+4*8)(RSP) \ STP (R25, R26), ((offset)+6*8)(RSP) \ STP (R27, g), ((offset)+8*8)(RSP) #define RESTORE_R19_TO_R28(offset) \ LDP ((offset)+0*8)(RSP), (R19, R20) \ LDP ((offset)+2*8)(RSP), (R21, R22) \ LDP ((offset)+4*8)(RSP), (R23, R24) \ LDP ((offset)+6*8)(RSP), (R25, R26) \ LDP ((offset)+8*8)(RSP), (R27, g) /* R28 */ #define SAVE_F8_TO_F15(offset) \
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Wed Mar 30 01:28:43 UTC 2022 - 1.5K bytes - Viewed (0) -
src/runtime/cgo/gcc_loong64.S
*/ .globl crosscall1 crosscall1: addi.d $r3, $r3, -160 st.d $r1, $r3, 0 st.d $r23, $r3, 8 st.d $r24, $r3, 16 st.d $r25, $r3, 24 st.d $r26, $r3, 32 st.d $r27, $r3, 40 st.d $r28, $r3, 48 st.d $r29, $r3, 56 st.d $r30, $r3, 64 st.d $r2, $r3, 72 st.d $r22, $r3, 80 fst.d $f24, $r3, 88 fst.d $f25, $r3, 96 fst.d $f26, $r3, 104
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Mon Dec 05 18:57:04 UTC 2022 - 1.5K bytes - Viewed (0) -
src/runtime/cgo/abi_loong64.h
// // Note: g is R22 #define SAVE_R22_TO_R31(offset) \ MOVV g, ((offset)+(0*8))(R3) \ MOVV R23, ((offset)+(1*8))(R3) \ MOVV R24, ((offset)+(2*8))(R3) \ MOVV R25, ((offset)+(3*8))(R3) \ MOVV R26, ((offset)+(4*8))(R3) \ MOVV R27, ((offset)+(5*8))(R3) \ MOVV R28, ((offset)+(6*8))(R3) \ MOVV R29, ((offset)+(7*8))(R3) \ MOVV R30, ((offset)+(8*8))(R3) \ MOVV R31, ((offset)+(9*8))(R3)
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Wed Mar 29 02:34:18 UTC 2023 - 1.9K bytes - Viewed (0) -
src/runtime/rt0_aix_ppc64.s
MOVD R16, 64(R1) MOVD R17, 72(R1) MOVD R18, 80(R1) MOVD R19, 88(R1) MOVD R20, 96(R1) MOVD R21,104(R1) MOVD R22, 112(R1) MOVD R23, 120(R1) MOVD R24, 128(R1) MOVD R25, 136(R1) MOVD R26, 144(R1) MOVD R27, 152(R1) MOVD R28, 160(R1) MOVD R29, 168(R1) MOVD g, 176(R1) // R30 MOVD R31, 184(R1) FMOVD F14, 192(R1) FMOVD F15, 200(R1) FMOVD F16, 208(R1) FMOVD F17, 216(R1)
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Tue Apr 18 22:20:51 UTC 2023 - 4.1K bytes - Viewed (0) -
src/runtime/signal_mipsx.go
print("r21 ", hex(c.r21()), "\n") print("r22 ", hex(c.r22()), "\t") print("r23 ", hex(c.r23()), "\n") print("r24 ", hex(c.r24()), "\t") print("r25 ", hex(c.r25()), "\n") print("r26 ", hex(c.r26()), "\t") print("r27 ", hex(c.r27()), "\n") print("r28 ", hex(c.r28()), "\t") print("r29 ", hex(c.r29()), "\n") print("r30 ", hex(c.r30()), "\t") print("r31 ", hex(c.r31()), "\n")
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Thu Oct 28 18:17:57 UTC 2021 - 3.1K bytes - Viewed (0) -
src/cmd/internal/obj/arm64/doc.go
Examples: ADD R19>>30, R10, R24 <=> add x24, x10, x19, lsr #30 ADDW R26->24, R21, R15 <=> add w15, w21, w26, asr #24 Extended registers are written as <Rm>{.<extend>{<<<amount>}}. <extend> can be UXTB, UXTH, UXTW, UXTX, SXTB, SXTH, SXTW or SXTX. Examples: ADDS R19.UXTB<<4, R9, R26 <=> adds x26, x9, w19, uxtb #4 ADDSW R14.SXTX, R14, R6 <=> adds w6, w14, w14, sxtx
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Mon Aug 07 00:21:42 UTC 2023 - 9.6K bytes - Viewed (0)