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Results 1 - 10 of 38 for dilation_w (0.23 sec)

  1. tensorflow/compiler/mlir/tfr/examples/mnist/ops_defs.py

        attrs=[
            'stride_w: int', 'stride_h: int', 'dilation_w: int', 'dilation_h: int',
            'padding: {"SAME", "VALID"}', 'act: {"", "RELU", "RELU6", "TANH"} = ""'
        ],
        derived_attrs=['T: {float, int8}'],
        outputs=['o: T'])
    def _composite_conv_add_relu(input_, filter_, bias, stride_w, stride_h,
                                 dilation_w, dilation_h, padding, act):
      res = tf.raw_ops.Conv2D(
          input=input_,
    Registered: Sun Jun 16 05:45:23 UTC 2024
    - Last Modified: Thu Aug 31 20:23:51 UTC 2023
    - 6.8K bytes
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  2. tensorflow/compiler/mlir/tfr/examples/mnist/mnist_ops_test.py

        bias = tf.zeros([8])
        kwargs = {
            'input_': input_,
            'filter_': filter_,
            'bias': bias,
            'stride_w': 2,
            'stride_h': 2,
            'dilation_w': 1,
            'dilation_h': 1,
            'padding': 'SAME',
            'act': 'RELU'
        }
    
        self._assertOpAndComposite([input_, filter_, bias],
                                   tf.function(gen_mnist_ops.new_conv2d),
    Registered: Sun Jun 16 05:45:23 UTC 2024
    - Last Modified: Tue Sep 28 21:37:05 UTC 2021
    - 4K bytes
    - Viewed (0)
  3. tensorflow/compiler/mlir/quantization/tensorflow/passes/lift_quantizable_spots_as_functions_drq.td

          (NamedAttr<"explicit_paddings"> $explicit_paddings),
          (NamedAttr<"dilations"> $dilations))),
      [(IsNotInLiftedFunc $res), (IsConstTensor $filter)], [], (addBenefit 1)>;
    
    def LiftDepthwiseConv : Pat<
      (TF_DepthwiseConv2dNativeOp:$res $input, $filter, $strides, $padding,
        $explicit_paddings, IsDataFormatNHWC:$data_format, $dilations),
      (LiftAsTFPartitionedCall<"composite_depthwise_conv2d_fn">
    Registered: Sun Jun 16 05:45:23 UTC 2024
    - Last Modified: Sun Dec 10 05:52:02 UTC 2023
    - 3.9K bytes
    - Viewed (0)
  4. tensorflow/compiler/mlir/quantization/tensorflow/tests/preprocess_op_weight_only.mlir

        %0 = "tf.DepthwiseConv2dNative"(%arg0, %arg1) {
          attr_map = "0:strides,1:padding,2:explicit_paddings,3:dilations", data_format = "NHWC", device = "", dilations = [1, 1, 1, 1], explicit_paddings = [], padding = "SAME", strides = [1, 1, 2, 1]
        } : (tensor<1x3x4x3xf32>, tensor<2x3x3x2xf32>) -> tensor<*xf32>
        return %0 : tensor<*xf32>
      }
    
    Registered: Sun Jun 16 05:45:23 UTC 2024
    - Last Modified: Mon Oct 30 06:52:55 UTC 2023
    - 4.7K bytes
    - Viewed (0)
  5. tensorflow/compiler/mlir/quantization/tensorflow/tests/preprocess_op.mlir

        %0 = "tf.DepthwiseConv2dNative"(%arg0, %arg1) {
          attr_map = "0:strides,1:padding,2:explicit_paddings,3:dilations", data_format = "NHWC", device = "", dilations = [1, 1, 1, 1], explicit_paddings = [], padding = "SAME", strides = [1, 1, 2, 1]
        } : (tensor<1x3x4x3xf32>, tensor<2x3x3x2xf32>) -> tensor<*xf32>
        return %0 : tensor<*xf32>
      }
    
    Registered: Sun Jun 16 05:45:23 UTC 2024
    - Last Modified: Mon Oct 30 06:52:55 UTC 2023
    - 3K bytes
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  6. tensorflow/compiler/mlir/tensorflow/tests/layout_optimization_layout_assignment_to_nchw.mlir

    // RUN: tf-opt %s -tf-layout-assignment=force-data-format=NCHW -verify-diagnostics | FileCheck %s --dump-input=always
    
    // IMPORTANT: In the following Conv2D tests tensor shapes do not match
    // convolution parameters (stride, dilations, etc...). This test only verifies
    // that changing convolution data layout will update all the attributes.
    
    // CHECK-LABEL: func @transposeConv2D
    Registered: Sun Jun 16 05:45:23 UTC 2024
    - Last Modified: Mon Oct 30 06:52:55 UTC 2023
    - 9K bytes
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  7. tensorflow/compiler/mlir/lite/quantization/tensorflow/tests/fallback_to_flex_ops_legacy.mlir

      %3 = "tf.AddV2"(%2, %1): (tensor<15x28x28x1xf32>, tensor<1xf32>) -> tensor<15x28x28x1xf32>
      func.return %2 : tensor<15x28x28x1xf32>
    Registered: Sun Jun 16 05:45:23 UTC 2024
    - Last Modified: Thu May 02 09:41:17 UTC 2024
    - 5.8K bytes
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  8. tensorflow/compiler/mlir/quantization/tensorflow/tests/prepare_quantize_drq_per_channel.mlir

        %0 = "tf.Conv2D"(%arg0, %arg1) {attr_map = "0:strides,1:use_cudnn_on_gpu,2:padding,3:explicit_paddings,4:dilations", data_format = "NHWC", device = "", dilations = [1, 1, 1, 1], explicit_paddings = [], padding = "SAME", strides = [1, 1, 2, 1], use_cudnn_on_gpu = true} : (tensor<1x3x4x512xf32>, tensor<2x3x512x2xf32>) -> tensor<*xf32>
        return %0 : tensor<*xf32>
      }
    
    Registered: Sun Jun 16 05:45:23 UTC 2024
    - Last Modified: Mon Oct 30 06:52:55 UTC 2023
    - 6.8K bytes
    - Viewed (0)
  9. tensorflow/compiler/mlir/quantization/tensorflow/tests/add_quantization_unit_loc.mlir

      %0 = "tf.Cast"(%arg0) {Truncate = false, device = ""} : (tensor<1x3x4x3xf32>) -> tensor<1x3x4x3xbf16>
      %1 = "tf.Conv2D"(%0, %cst) {data_format = "NHWC", dilations = [1, 1, 1, 1], padding = "SAME", strides = [1, 1, 2, 1]}
           : (tensor<1x3x4x3xbf16>, tensor<2x3x3x2xbf16>) -> tensor<1x3x2x2xbf16> loc("Model/conv2d")
    Registered: Sun Jun 16 05:45:23 UTC 2024
    - Last Modified: Tue Oct 03 02:39:10 UTC 2023
    - 3.6K bytes
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  10. tensorflow/compiler/mlir/lite/tests/prepare-tf-with-allowing-bf16-and-f16-type-legalization.mlir

    // CHECK-LABEL: conv_2d_bf16
    func.func @conv_2d_bf16(%arg0 : tensor<256x32x32x3xbf16>, %arg1 : tensor<3x3x3x16xbf16>) -> tensor<256x8x7x16xbf16> {
      %0 = "tf.Conv2D"(%arg0, %arg1) {T = "tfdtype$DT_FLOAT", data_format = "NHWC", dilations = [1, 2, 3, 1], padding = "SAME", strides = [1, 4, 5, 1]} : (tensor<256x32x32x3xbf16>, tensor<3x3x3x16xbf16>) -> tensor<256x8x7x16xbf16>
      func.return %0 : tensor<256x8x7x16xbf16>
      // CHECK: "tfl.conv_2d"
    }
    
    Registered: Sun Jun 16 05:45:23 UTC 2024
    - Last Modified: Thu May 26 23:53:32 UTC 2022
    - 2.2K bytes
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