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Results 1 - 10 of 42 for cmpeqb (0.12 sec)
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src/cmd/internal/obj/ppc64/anames.go
"VSRAW", "VSRAD", "VSOI", "VSLDOI", "VCLZ", "VCLZB", "VCLZH", "VCLZW", "VCLZD", "VPOPCNT", "VPOPCNTB", "VPOPCNTH", "VPOPCNTW", "VPOPCNTD", "VCMPEQ", "VCMPEQUB", "VCMPEQUBCC", "VCMPEQUH", "VCMPEQUHCC", "VCMPEQUW", "VCMPEQUWCC", "VCMPEQUD", "VCMPEQUDCC", "VCMPGT", "VCMPGTUB", "VCMPGTUBCC", "VCMPGTUH", "VCMPGTUHCC",
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Mon Apr 01 18:50:29 UTC 2024 - 6.7K bytes - Viewed (0) -
src/cmd/internal/obj/mips/anames.go
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Tue Aug 08 12:17:12 UTC 2023 - 1.4K bytes - Viewed (0) -
src/cmd/internal/obj/loong64/anames.go
"ABSF", "ADD", "ADDD", "ADDF", "ADDU", "ADDW", "AND", "BEQ", "BGEZ", "BLEZ", "BGTZ", "BLTZ", "BFPF", "BFPT", "BNE", "BREAK", "CLO", "CLZ", "CMPEQD", "CMPEQF", "CMPGED", "CMPGEF", "CMPGTD", "CMPGTF", "LU12IW", "LU32ID", "LU52ID", "PCALAU12I", "PCADDU12I", "JIRL", "BGE", "BLT", "BLTU", "BGEU", "DIV", "DIVD",
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Wed May 22 02:04:54 UTC 2024 - 1.9K bytes - Viewed (0) -
src/cmd/asm/internal/arch/loong64.go
} // IsLoong64CMP reports whether the op (as defined by an loong64.A* constant) is // one of the CMP instructions that require special handling. func IsLoong64CMP(op obj.As) bool { switch op { case loong64.ACMPEQF, loong64.ACMPEQD, loong64.ACMPGEF, loong64.ACMPGED, loong64.ACMPGTF, loong64.ACMPGTD: return true } return false } // IsLoong64MUL reports whether the op (as defined by an loong64.A* constant) is
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Wed May 22 02:04:54 UTC 2024 - 2.1K bytes - Viewed (0) -
src/cmd/asm/internal/arch/mips.go
return false } // IsMIPSCMP reports whether the op (as defined by an mips.A* constant) is // one of the CMP instructions that require special handling. func IsMIPSCMP(op obj.As) bool { switch op { case mips.ACMPEQF, mips.ACMPEQD, mips.ACMPGEF, mips.ACMPGED, mips.ACMPGTF, mips.ACMPGTD: return true } return false } // IsMIPSMUL reports whether the op (as defined by an mips.A* constant) is
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Wed Mar 04 19:06:44 UTC 2020 - 1.7K bytes - Viewed (0) -
src/internal/bytealg/equal_386.s
JMP bigloop #endif MOVOU (SI), X0 MOVOU (DI), X1 MOVOU 16(SI), X2 MOVOU 16(DI), X3 MOVOU 32(SI), X4 MOVOU 32(DI), X5 MOVOU 48(SI), X6 MOVOU 48(DI), X7 PCMPEQB X1, X0 PCMPEQB X3, X2 PCMPEQB X5, X4 PCMPEQB X7, X6 PAND X2, X0 PAND X6, X4 PAND X4, X0 PMOVMSKB X0, DX ADDL $64, SI ADDL $64, DI SUBL $64, BX CMPL DX, $0xffff JEQ hugeloop MOVB $0, (AX) RET
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Mon Aug 23 21:22:58 UTC 2021 - 2.1K bytes - Viewed (0) -
src/internal/bytealg/equal_amd64.s
MOVOU 48(SI), X6 MOVOU 48(DI), X7 PCMPEQB X1, X0 PCMPEQB X3, X2 PCMPEQB X5, X4 PCMPEQB X7, X6 PAND X2, X0 PAND X6, X4 PAND X4, X0 PMOVMSKB X0, DX ADDQ $64, SI ADDQ $64, DI SUBQ $64, BX CMPL DX, $0xffff JEQ hugeloop XORQ AX, AX // return 0 RET #endif // 64 bytes at a time using ymm registers PCALIGN $16 hugeloop_avx2: CMPQ BX, $64 JB bigloop_avx2 VMOVDQU (SI), Y0
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Fri Nov 17 16:34:40 UTC 2023 - 2.8K bytes - Viewed (0) -
src/internal/bytealg/compare_amd64.s
TEXT cmpbody<>(SB),NOSPLIT,$0-0 CMPQ SI, DI JEQ allsame CMPQ BX, DX MOVQ DX, R8 CMOVQLT BX, R8 // R8 = min(alen, blen) = # of bytes to compare CMPQ R8, $8 JB small CMPQ R8, $63 JBE loop #ifndef hasAVX2 CMPB internal∕cpu·X86+const_offsetX86HasAVX2(SB), $1 JEQ big_loop_avx2 JMP big_loop #else JMP big_loop_avx2 #endif loop: CMPQ R8, $16 JBE _0through16 MOVOU (SI), X0
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Thu Aug 18 17:17:01 UTC 2022 - 4.3K bytes - Viewed (0) -
src/internal/bytealg/indexbyte_amd64.s
PUNPCKLBW X0, X0 PUNPCKLBW X0, X0 PSHUFL $0, X0, X0 CMPQ BX, $16 JLT small MOVQ SI, DI CMPQ BX, $32 JA avx2 sse: LEAQ -16(SI)(BX*1), AX // AX = address of last 16 bytes JMP sseloopentry PCALIGN $16 sseloop: // Move the next 16-byte chunk of the data into X1. MOVOU (DI), X1 // Compare bytes in X0 to X1. PCMPEQB X0, X1 // Take the top bit of each byte in X1 and put the result in DX.
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Wed Nov 01 19:06:01 UTC 2023 - 3.1K bytes - Viewed (0) -
src/cmd/asm/internal/asm/testdata/loong64enc1.s
SLLV R4, R5, R6 // a6901800 ROTRV R4, R5 // a5901b00 ROTRV R4, R5, R6 // a6901b00 CLO R4, R5 // 85100000 CLZ R4, R5 // 85140000 ADDF F4, F5 // a5900001 ADDF F4, R5, F6 // a6900001 CMPEQF F4, R5 // a010120c ABSF F4, F5 // 85041401 MOVVF F4, F5 // 85181d01 MOVF F4, F5 // 85941401 MOVD F4, F5 // 85981401 MOVW R4, result+16(FP) // 64608029 MOVWU R4, result+16(FP) // 64608029
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Wed May 22 02:04:54 UTC 2024 - 8.2K bytes - Viewed (0)