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Results 1 - 6 of 6 for MOVB (0.01 sec)
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src/cmd/asm/internal/asm/testdata/loong64enc3.s
MOVWU R4, result+4097(FP) // 3e000014de8f1000c4278029 MOVV R4, result+65540(FP) // 1e020014de8f1000c433c029 MOVV R4, result+4097(FP) // 3e000014de8f1000c427c029 MOVB R4, result+65540(FP) // 1e020014de8f1000c4330029 MOVB R4, result+4097(FP) // 3e000014de8f1000c4270029 MOVBU R4, result+65540(FP) // 1e020014de8f1000c4330029 MOVBU R4, result+4097(FP) // 3e000014de8f1000c4270029
Registered: Tue Nov 05 11:13:11 UTC 2024 - Last Modified: Mon Jul 29 14:29:30 UTC 2024 - 5.9K bytes - Viewed (0) -
src/cmd/asm/internal/asm/testdata/amd64.s
MOVW foo(SP)(AX*4), R8 // 66448b0484 MOVW foo+32(SP)(R9*8), CX // 66428b4ccc20 MOVW foo+32323(SP)(AX*1), DX // 668b9404437e0000 MOVB foo(SP)(AX*2), AL // 8a0444 MOVB foo+32(SP)(CX*4), AH // 8a648c20 MOVB foo+32323(SP)(CX*8), R9 // 448a8ccc437e0000 // Tests for TLS reference. MOVQ (TLS), AX MOVQ 8(TLS), DX // LTYPE0 nonnon { outcode($1, &$2); } RET // c3
Registered: Tue Nov 05 11:13:11 UTC 2024 - Last Modified: Tue Apr 09 18:57:21 UTC 2019 - 3.3K bytes - Viewed (0) -
src/cmd/asm/internal/asm/testdata/mips.s
MOVW 16(R1), R2 MOVW (R1), R2 LL (R1), R2 // LMOVB rreg ',' rreg // { // outcode(int($1), &$2, 0, &$4); // } MOVB R1, R2 // LMOVB addr ',' rreg // { // outcode(int($1), &$2, 0, &$4); // } MOVB foo<>+3(SB), R2 MOVB 16(R1), R2 MOVB (R1), R2 // // load floats // // LFMOV addr ',' freg // { // outcode(int($1), &$2, 0, &$4); // } MOVF foo<>+3(SB), F2
Registered: Tue Nov 05 11:13:11 UTC 2024 - Last Modified: Tue Aug 08 12:17:12 UTC 2023 - 6.7K bytes - Viewed (0) -
src/cmd/asm/internal/asm/testdata/loong64enc2.s
MOVWU R4, name(SB) // 1e00001ac4038029 MOVV R4, name(SB) // 1e00001ac403c029 MOVB R4, name(SB) // 1e00001ac4030029 MOVBU R4, name(SB) // 1e00001ac4030029 MOVF F4, name(SB) // 1e00001ac403402b MOVD F4, name(SB) // 1e00001ac403c02b MOVW name(SB), R4 // 1e00001ac4038028 MOVWU name(SB), R4 // 1e00001ac403802a MOVV name(SB), R4 // 1e00001ac403c028 MOVB name(SB), R4 // 1e00001ac4030028 MOVBU name(SB), R4 // 1e00001ac403002a
Registered: Tue Nov 05 11:13:11 UTC 2024 - Last Modified: Mon Apr 10 15:50:11 UTC 2023 - 3K bytes - Viewed (0) -
src/cmd/asm/internal/asm/testdata/riscv64error.s
// license that can be found in the LICENSE file. TEXT errors(SB),$0 MOV $errors(SB), (X5) // ERROR "address load must target register" MOV $8(SP), (X5) // ERROR "address load must target register" MOVB $8(SP), X5 // ERROR "unsupported address load" MOVH $8(SP), X5 // ERROR "unsupported address load" MOVW $8(SP), X5 // ERROR "unsupported address load" MOVF $8(SP), X5 // ERROR "unsupported address load"
Registered: Tue Nov 05 11:13:11 UTC 2024 - Last Modified: Sun Apr 07 03:32:27 UTC 2024 - 2.8K bytes - Viewed (0) -
src/cmd/asm/internal/lex/lex_test.go
"\tMOVBLZX (off*4)(R12), reg \\", "\tADDB reg, DX", "KEYROUND(X0, LOAD, 8, AX, BX, 0)", ), "\n.MOVBLZX.(.BP.).(.DX.*.4.).,.R8.\n.\n.MOVBLZX.(.(.8.+.1.).*.4.).(.R12.).,.BX.\n.ADDB.BX.,.DX.\n.MOVB.R8.,.(.8.*.4.).(.R12.).\n.PINSRW.$.0.,.(.BP.).(.R8.*.4.).,.X0.\n", }, { "taken #ifdef", lines( "#define A", "#ifdef A", "#define B 1234", "#endif", "B", ), "1234.\n",
Registered: Tue Nov 05 11:13:11 UTC 2024 - Last Modified: Tue Aug 29 07:48:38 UTC 2023 - 5.8K bytes - Viewed (0)