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Results 1 - 9 of 9 for HasAVX (0.14 sec)
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src/internal/cpu/cpu_x86_test.go
//go:build 386 || amd64 package cpu_test import ( . "internal/cpu" "internal/godebug" "testing" ) func TestX86ifAVX2hasAVX(t *testing.T) { if X86.HasAVX2 && !X86.HasAVX { t.Fatalf("HasAVX expected true when HasAVX2 is true, got false") } } func TestX86ifAVX512FhasAVX2(t *testing.T) { if X86.HasAVX512F && !X86.HasAVX2 { t.Fatalf("HasAVX2 expected true when HasAVX512F is true, got false")
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Wed Nov 15 18:30:03 UTC 2023 - 1.4K bytes - Viewed (0) -
src/runtime/asm_amd64.h
#ifdef GOAMD64_v2 #define hasPOPCNT #define hasSSE42 #endif #ifdef GOAMD64_v3 #define hasAVX #define hasAVX2 #define hasPOPCNT #define hasSSE42 #endif #ifdef GOAMD64_v4 #define hasAVX #define hasAVX2 #define hasAVX512F #define hasAVX512BW #define hasAVX512VL #define hasPOPCNT #define hasSSE42
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Wed Nov 15 18:30:03 UTC 2023 - 631 bytes - Viewed (0) -
src/runtime/cpuflags_amd64.go
processor := processorVersionInfo & 0x0FFF3FF0 isIntelBridgeFamily := isIntel && processor == 0x206A0 || processor == 0x206D0 || processor == 0x306A0 || processor == 0x306E0 useAVXmemmove = cpu.X86.HasAVX && !isIntelBridgeFamily
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Fri Aug 24 07:29:52 UTC 2018 - 533 bytes - Viewed (0) -
src/math/exp_amd64.go
// Use of this source code is governed by a BSD-style // license that can be found in the LICENSE file. //go:build amd64 package math import "internal/cpu"
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Thu Oct 28 18:17:57 UTC 2021 - 261 bytes - Viewed (0) -
src/runtime/cpuflags.go
package runtime import ( "internal/cpu" "unsafe" ) // Offsets into internal/cpu records for use in assembly. const ( offsetX86HasAVX = unsafe.Offsetof(cpu.X86.HasAVX) offsetX86HasAVX2 = unsafe.Offsetof(cpu.X86.HasAVX2) offsetX86HasERMS = unsafe.Offsetof(cpu.X86.HasERMS) offsetX86HasRDTSCP = unsafe.Offsetof(cpu.X86.HasRDTSCP) offsetARMHasIDIVA = unsafe.Offsetof(cpu.ARM.HasIDIVA)
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Mon Aug 23 21:22:58 UTC 2021 - 810 bytes - Viewed (0) -
src/vendor/golang.org/x/sys/cpu/cpu_x86.go
package cpu import "runtime" const cacheLineSize = 64 func initOptions() { options = []option{ {Name: "adx", Feature: &X86.HasADX}, {Name: "aes", Feature: &X86.HasAES}, {Name: "avx", Feature: &X86.HasAVX}, {Name: "avx2", Feature: &X86.HasAVX2}, {Name: "avx512", Feature: &X86.HasAVX512}, {Name: "avx512f", Feature: &X86.HasAVX512F}, {Name: "avx512cd", Feature: &X86.HasAVX512CD},
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Thu Oct 19 23:33:33 UTC 2023 - 4.9K bytes - Viewed (0) -
src/internal/cpu/cpu_x86.go
option{Name: "ssse3", Feature: &X86.HasSSSE3}) } if level < 3 { // These options are required at level 3. At lower levels // they can be turned off. options = append(options, option{Name: "avx", Feature: &X86.HasAVX}, option{Name: "avx2", Feature: &X86.HasAVX2}, option{Name: "bmi1", Feature: &X86.HasBMI1}, option{Name: "bmi2", Feature: &X86.HasBMI2}, option{Name: "fma", Feature: &X86.HasFMA}) } if level < 4 {
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Wed May 22 13:40:20 UTC 2024 - 5.8K bytes - Viewed (0) -
src/runtime/preempt_amd64.s
MOVQ DI, 40(SP) MOVQ R8, 48(SP) MOVQ R9, 56(SP) MOVQ R10, 64(SP) MOVQ R11, 72(SP) MOVQ R12, 80(SP) MOVQ R13, 88(SP) MOVQ R14, 96(SP) MOVQ R15, 104(SP) #ifdef GOOS_darwin #ifndef hasAVX CMPB internal∕cpu·X86+const_offsetX86HasAVX(SB), $0 JE 2(PC) #endif VZEROUPPER #endif MOVUPS X0, 112(SP) MOVUPS X1, 128(SP) MOVUPS X2, 144(SP) MOVUPS X3, 160(SP) MOVUPS X4, 176(SP)
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Thu Aug 18 17:17:01 UTC 2022 - 1.7K bytes - Viewed (0) -
src/internal/cpu/cpu.go
// The booleans in X86 contain the correspondingly named cpuid feature bit. // HasAVX and HasAVX2 are only set if the OS does support XMM and YMM registers // in addition to the cpuid feature bit being set. // The struct is padded to avoid false sharing. var X86 struct { _ CacheLinePad HasAES bool HasADX bool HasAVX bool HasAVX2 bool HasAVX512F bool HasAVX512BW bool HasAVX512VL bool
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Wed May 15 19:57:43 UTC 2024 - 7.1K bytes - Viewed (0)