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Results 1 - 6 of 6 for H8 (0.17 sec)

  1. src/cmd/internal/obj/arm64/doc.go

    Register with arrangement and register with arrangement and index.
    
    Examples:
    
    	VADD V5.H8, V18.H8, V9.H8                     <=>    add v9.8h, v18.8h, v5.8h
    	VLD1 (R2), [V21.B16]                          <=>    ld1 {v21.16b}, [x2]
    	VST1.P V9.S[1], (R16)(R21)                    <=>    st1 {v9.s}[1], [x16], x28
    	VST1.P [V13.H8, V14.H8, V15.H8], (R3)(R14)    <=>    st1 {v13.8h-v15.8h}, [x3], x14
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Mon Aug 07 00:21:42 UTC 2023
    - 9.6K bytes
    - Viewed (0)
  2. src/vendor/golang.org/x/crypto/chacha20/chacha_arm64.s

    	VADD	V3.S4, V7.S4, V3.S4
    	VEOR	V12.B16, V0.B16, V12.B16
    	VEOR	V13.B16, V1.B16, V13.B16
    	VEOR	V14.B16, V2.B16, V14.B16
    	VEOR	V15.B16, V3.B16, V15.B16
    	VREV32	V12.H8, V12.H8
    	VREV32	V13.H8, V13.H8
    	VREV32	V14.H8, V14.H8
    	VREV32	V15.H8, V15.H8
    	// V8..V11 += V12..V15
    	// V4..V7 <<<= ((V4..V7 XOR V8..V11), 12)
    	VADD	V8.S4, V12.S4, V8.S4
    	VADD	V9.S4, V13.S4, V9.S4
    	VADD	V10.S4, V14.S4, V10.S4
    	VADD	V11.S4, V15.S4, V11.S4
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Thu Oct 19 23:33:33 UTC 2023
    - 8K bytes
    - Viewed (0)
  3. src/cmd/internal/obj/arm64/list7.go

    }
    
    func arrange(a int) string {
    	switch a {
    	case ARNG_8B:
    		return "B8"
    	case ARNG_16B:
    		return "B16"
    	case ARNG_4H:
    		return "H4"
    	case ARNG_8H:
    		return "H8"
    	case ARNG_2S:
    		return "S2"
    	case ARNG_4S:
    		return "S4"
    	case ARNG_1D:
    		return "D1"
    	case ARNG_2D:
    		return "D2"
    	case ARNG_B:
    		return "B"
    	case ARNG_H:
    		return "H"
    	case ARNG_S:
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Wed Oct 18 17:56:30 UTC 2023
    - 6K bytes
    - Viewed (0)
  4. src/internal/chacha8rand/chacha8_arm64.s

    // V30 is used as a temporary, and V31 is assumed to
    // hold the index table for rotate left 8.
    #define QR(A, B, C, D) \
    	VADD A.S4, B.S4, A.S4; VEOR D.B16, A.B16, D.B16;   VREV32 D.H8, D.H8; \
    	VADD C.S4, D.S4, C.S4; VEOR B.B16, C.B16, V30.B16; VSHL $12, V30.S4, B.S4; VSRI $20, V30.S4, B.S4 \
    	VADD A.S4, B.S4, A.S4; VEOR D.B16, A.B16, D.B16;   VTBL V31.B16, [D.B16], D.B16; \
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Tue Dec 05 20:34:30 UTC 2023
    - 3.2K bytes
    - Viewed (0)
  5. src/crypto/sha256/sha256block_arm64.s

    	SHA256SU0	V6.S4, V5.S4                        // V5: (su0(W5)+W4,...,su0(W8)+W7)
    	SHA256SU1	V7.S4, V6.S4, V4.S4                 // V4: W16-W19
    	HASHUPDATE                                          // H8
    
    	VADD	V18.S4, V6.S4, V9.S4                        // V18(W8+K8...W11+K11)
    	SHA256SU0	V7.S4, V6.S4                        // V6: (su0(W9)+W8,...,su0(W12)+W11)
    	SHA256SU1	V4.S4, V7.S4, V5.S4                 // V5: W20-W23
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Mon Mar 04 17:29:44 UTC 2024
    - 5.7K bytes
    - Viewed (0)
  6. src/crypto/tls/testdata/Server-TLSv13-CHACHA20-SHA256

    00000130  a5 96 66 5c 4e 49 5a 8e  fd 9d 74 dc e7 f0 99 f8  |..f\NIZ...t.....|
    00000140  d5 95 7a 5b ba b6 ab 87  90 a5 35 19 bf 99 2c 04  |..z[......5...,.|
    00000150  93 61 e3 9b 5c 06 48 38  f0 25 8a be 30 cd 43 c0  |.a..\.H8.%..0.C.|
    00000160  10 c9 1d 51 3e 93 5f 6c  02 1c 38 fe 78 44 1a ea  |...Q>._l..8.xD..|
    00000170  99 a4 ef 7d 03 ce 71 95  d7 1d e1 b3 b8 e2 20 99  |...}..q....... .|
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Thu May 25 00:14:50 UTC 2023
    - 7.3K bytes
    - Viewed (0)
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