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Results 1 - 3 of 3 for ANDconst (0.07 sec)

  1. src/cmd/compile/internal/ssa/_gen/PPC64latelower.rules

    (CMPconst [0] z:(ANDconst [c] x)) && int64(uint16(c)) == c && v.Block == z.Block => (CMPconst [0] convertPPC64OpToOpCC(z))
    // And finally, fixup the flag user.
    (CMPconst <t> [0] (Select0 z:((ADD|AND|ANDN|OR|SUB|NOR|XOR)CC x y))) => (Select1 <t> z)
    (CMPconst <t> [0] (Select0 z:((ADDCCconst|ANDCCconst|NEGCC|CNTLZDCC|RLDICLCC) y))) => (Select1 <t> z)
    
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Wed May 22 19:59:38 UTC 2024
    - 3.8K bytes
    - Viewed (0)
  2. test/codegen/bitfield.go

    func ubfiz7(x uint16) uint64 {
    	return uint64(x << 10) // arm64:"UBFIZ\t[$]10, R[0-9]+, [$]6",
    }
    
    func ubfiz8(x uint8) uint64 {
    	return uint64(x << 7) // arm64:"UBFIZ\t[$]7, R[0-9]+, [$]1",
    }
    
    // merge ANDconst into ubfiz.
    func ubfiz9(x uint64) uint64 {
    	// arm64:"UBFIZ\t[$]3, R[0-9]+, [$]12",-"LSL",-"AND"
    	// s390x:"RISBGZ\t[$]49, [$]60, [$]3,",-"SLD",-"AND"
    	return (x & 0xfff) << 3
    }
    
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Tue Aug 23 06:11:32 UTC 2022
    - 9.6K bytes
    - Viewed (0)
  3. src/cmd/compile/internal/ssa/_gen/ARM64latelower.rules

    // These are often the exact inverse of rules in ARM64.rules.
    
    (ADDconst [c] x) && !isARM64addcon(c)  => (ADD x (MOVDconst [c]))
    (SUBconst [c] x) && !isARM64addcon(c)  => (SUB x (MOVDconst [c]))
    (ANDconst [c] x) && !isARM64bitcon(uint64(c)) => (AND x (MOVDconst [c]))
    (ORconst  [c] x) && !isARM64bitcon(uint64(c))  => (OR  x (MOVDconst [c]))
    (XORconst [c] x) && !isARM64bitcon(uint64(c))  => (XOR x (MOVDconst [c]))
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Tue Mar 12 19:38:41 UTC 2024
    - 4.1K bytes
    - Viewed (0)
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