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Results 1 - 3 of 3 for BP (0.12 sec)

  1. internal/bpool/bpool.go

    func (bp *BytePoolCap) Populate() {
    	for _, buf := range reedsolomon.AllocAligned(cap(bp.c), bp.wcap) {
    		bp.Put(buf[:bp.w])
    	}
    }
    
    // Get gets a []byte from the BytePool, or creates a new one if none are
    // available in the pool.
    func (bp *BytePoolCap) Get() (b []byte) {
    	if bp == nil {
    		return nil
    	}
    	select {
    	case b = <-bp.c:
    		// reuse existing buffer
    	default:
    Go
    - Registered: Sun May 05 19:28:20 GMT 2024
    - Last Modified: Fri Apr 19 16:44:59 GMT 2024
    - 2.6K bytes
    - Viewed (0)
  2. src/cmd/asm/internal/asm/testdata/amd64error.s

    	VPGATHERQQ (BP)(X2*2), K1, X2   // ERROR "index and destination registers should be distinct"
    	VPGATHERQQ (BP)(Y15*2), K1, Y15 // ERROR "index and destination registers should be distinct"
    	VPGATHERQQ (BP)(Z20*2), K1, Z20 // ERROR "index and destination registers should be distinct"
    	VPGATHERDQ (BP)(X2*2), K1, X2   // ERROR "index and destination registers should be distinct"
    Others
    - Registered: Tue Apr 30 11:13:12 GMT 2024
    - Last Modified: Wed Jun 14 00:03:57 GMT 2023
    - 8.9K bytes
    - Viewed (0)
  3. src/cmd/asm/internal/lex/lex_test.go

    			"#define KEYROUND(xmm, load, off, r1, r2, index) \\",
    			"\tMOVBLZX	(BP)(DX*4),	R8 \\",
    			"\tload((off+1), r2) \\",
    			"\tMOVB	R8,		(off*4)(R12) \\",
    			"\tPINSRW	$index, (BP)(R8*4), xmm",
    			"#define LOAD(off, reg) \\",
    			"\tMOVBLZX	(off*4)(R12),	reg \\",
    			"\tADDB	reg,		DX",
    			"KEYROUND(X0, LOAD, 8, AX, BX, 0)",
    		),
    Go
    - Registered: Tue Apr 30 11:13:12 GMT 2024
    - Last Modified: Tue Aug 29 07:48:38 GMT 2023
    - 5.8K bytes
    - Viewed (0)
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