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Results 1 - 6 of 6 for Meister (0.3 sec)

  1. src/archive/zip/register.go

    cui fliter <******@****.***> 1697084298 +0800
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    - Registered: Tue Apr 30 11:13:12 GMT 2024
    - Last Modified: Fri Oct 13 18:36:46 GMT 2023
    - 3.7K bytes
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  2. src/cmd/asm/internal/asm/testdata/riscv64error.s

    	MOV	$0, 0(SP)			// ERROR "constant load must target register"
    	MOV	$0, 8(SP)			// ERROR "constant load must target register"
    	MOV	$1234, 0(SP)			// ERROR "constant load must target register"
    	MOV	$1234, 8(SP)			// ERROR "constant load must target register"
    	MOVB	$1, X5				// ERROR "unsupported constant load"
    	MOVH	$1, X5				// ERROR "unsupported constant load"
    	MOVW	$1, X5				// ERROR "unsupported constant load"
    Others
    - Registered: Tue Apr 30 11:13:12 GMT 2024
    - Last Modified: Sun Apr 07 03:32:27 GMT 2024
    - 2.8K bytes
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  3. src/cmd/asm/internal/arch/arm.go

    		(op1 << 20) | // MCR/MRC
    		((int64(bits) ^ arm.C_SCOND_XOR) << 28) | // scond
    		((x0 & 15) << 8) | //coprocessor number
    		((x1 & 7) << 21) | // coprocessor operation
    		((x2 & 15) << 12) | // ARM register
    		((x3 & 15) << 16) | // Crn
    		((x4 & 15) << 0) | // Crm
    		((x5 & 7) << 5) | // coprocessor information
    		(1 << 4) /* must be set */
    	return offset, arm.AMRC, true
    }
    
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    - Registered: Tue Apr 30 11:13:12 GMT 2024
    - Last Modified: Fri Nov 18 17:59:44 GMT 2022
    - 6.1K bytes
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  4. src/cmd/asm/internal/asm/testdata/amd64error.s

    	// scaled index register.
    	VPGATHERDQ X12,(R13)(AX*2), X11 // ERROR "invalid instruction"
    	VPGATHERDQ X2, 664(BX*1), X1    // ERROR "invalid instruction"
    	VPGATHERDQ Y2, (BP)(AX*2), Y1   // ERROR "invalid instruction"
    	VPGATHERDQ Y5, 664(DX*8), Y6    // ERROR "invalid instruction"
    	VPGATHERDQ Y5, (DX), Y0         // ERROR "invalid instruction"
    	// VM/X rejects Y index register.
    Others
    - Registered: Tue Apr 30 11:13:12 GMT 2024
    - Last Modified: Wed Jun 14 00:03:57 GMT 2023
    - 8.9K bytes
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  5. src/bytes/compare_test.go

    	// difference that for some j, a[j]>b[j] and a[j+1]<b[j+1]. If the implementation
    	// compares large chunks with wrong endianness, it gets wrong result.
    	// no vector register is larger than 512 bytes for now
    	const maxLength = 512
    	a := make([]byte, maxLength)
    	b := make([]byte, maxLength)
    	// randomish but deterministic data. No 0 or 255.
    	for i := 0; i < maxLength; i++ {
    Go
    - Registered: Tue Apr 30 11:13:12 GMT 2024
    - Last Modified: Thu Jul 13 23:11:42 GMT 2023
    - 6.8K bytes
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  6. src/cmd/asm/internal/lex/lex.go

    	BuildComment                          // //go:build or +build comment
    	macroName                             // name of macro that should not be expanded
    )
    
    // IsRegisterShift reports whether the token is one of the ARM register shift operators.
    func IsRegisterShift(r ScanToken) bool {
    	return ROT <= r && r <= LSH // Order looks backwards because these are negative.
    }
    
    func (t ScanToken) String() string {
    	switch t {
    	case scanner.EOF:
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    - Registered: Tue Apr 30 11:13:12 GMT 2024
    - Last Modified: Tue Aug 29 18:31:05 GMT 2023
    - 4.1K bytes
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