Search Options

Results per page
Sort
Preferred Languages
Advance

Results 61 - 70 of 103 for dilation_h (0.34 sec)

  1. tensorflow/compiler/mlir/quantization/tensorflow/tests/prepare_quantize_ptq.mlir

        %2 = "tf.Conv2D"(%1, %0) {attr_map = "0:strides,1:use_cudnn_on_gpu,2:padding,3:explicit_paddings,4:dilations", data_format = "NHWC", device = "", dilations = [1, 1, 1, 1], explicit_paddings = [], padding = "SAME", strides = [1, 1, 2, 1], use_cudnn_on_gpu = true} : (tensor<1x3x4x3xf32>, tensor<2x3x3x2xf32>) -> tensor<*xf32>
    Registered: Sun Jun 16 05:45:23 UTC 2024
    - Last Modified: Wed Feb 01 10:21:29 UTC 2023
    - 9.1K bytes
    - Viewed (0)
  2. tensorflow/compiler/mlir/lite/tests/end2end/conv_2d.pbtxt

      attr {
        key: "T"
        value {
          type: DT_FLOAT
        }
      }
      attr {
        key: "data_format"
        value {
          s: "NHWC"
        }
      }
      attr {
        key: "dilations"
        value {
          list {
            i: 1
            i: 1
            i: 1
            i: 1
          }
        }
      }
      attr {
        key: "explicit_paddings"
        value {
          list {
          }
    Registered: Sun Jun 16 05:45:23 UTC 2024
    - Last Modified: Fri Jun 28 06:29:38 UTC 2019
    - 3.7K bytes
    - Viewed (0)
  3. tensorflow/compiler/jit/tests/keras_imagenet_main_graph_mode.pbtxt

      attr {
        key: "T"
        value {
          type: DT_FLOAT
        }
      }
      attr {
        key: "data_format"
        value {
          s: "NCHW"
        }
      }
      attr {
        key: "dilations"
        value {
          list {
            i: 1
            i: 1
            i: 1
            i: 1
          }
        }
      }
      attr {
        key: "explicit_paddings"
        value {
    Registered: Sun Jun 16 05:45:23 UTC 2024
    - Last Modified: Thu May 30 02:52:54 UTC 2019
    - 1.1M bytes
    - Viewed (0)
  4. tensorflow/compiler/mlir/quantization/stablehlo/python/integration_test/quantize_model_test_base.py

            offset = [0.5] * self.out_channel_size
            mean, variance = scale, offset
            out = nn_ops.conv2d(
                input_tensor,
                self.filters,
                strides=strides,
                dilations=dilations,
                padding=padding,
                data_format='NHWC',
                name='sample/conv',
            )
            if bias_fn is not None:
              out = nn_ops.bias_add(out, self.bias)
    Registered: Sun Jun 16 05:45:23 UTC 2024
    - Last Modified: Tue May 14 06:31:57 UTC 2024
    - 18.2K bytes
    - Viewed (0)
  5. tensorflow/compiler/mlir/quantization/tensorflow/tests/fake_quant_e2e_flow.mlir

      %2 = "tf.Conv2D"(%1, %0) {data_format = "NHWC", device = "", dilations = [1, 1, 1, 1], explicit_paddings = [], padding = "SAME", strides = [1, 1, 2, 1], use_cudnn_on_gpu = true} : (tensor<*xf32>, tensor<*xf32>) -> tensor<*xf32>
    Registered: Sun Jun 16 05:45:23 UTC 2024
    - Last Modified: Mon Oct 30 06:52:55 UTC 2023
    - 3.5K bytes
    - Viewed (0)
  6. tensorflow/compiler/mlir/quantization/tensorflow/tests/convert_tpu_model_to_cpu.mlir

      %4 = "tf.Transpose"(%3, %cst_1) {_tpu_replicate = "cluster", device = ""} : (tensor<1x3x3x4xbf16>, tensor<4xi32>) -> tensor<1x3x4x3xbf16>
      %5 = "tf.Conv2D"(%4, %cst) {_tpu_replicate = "cluster", data_format = "NHWC", device = "", dilations = [1, 1, 1, 1], explicit_paddings = [], padding = "SAME", strides = [1, 1, 2, 1], use_cudnn_on_gpu = true} : (tensor<1x3x4x3xbf16>, tensor<2x3x3x2xbf16>) -> tensor<1x3x2x2xbf16>
    Registered: Sun Jun 16 05:45:23 UTC 2024
    - Last Modified: Mon Oct 30 06:52:55 UTC 2023
    - 4.3K bytes
    - Viewed (0)
  7. tensorflow/compiler/mlir/quantization/stablehlo/tests/passes/insert_calibration_statistics_saver.mlir

      %0 = "tf.Conv2D"(%output, %cst) <{data_format = "NHWC", dilations = [1, 1, 1, 1], explicit_paddings = [], padding = "SAME", strides = [1, 2, 2, 1], use_cudnn_on_gpu = true}> {attr_map = "0:strides,1:use_cudnn_on_gpu,2:padding,3:explicit_paddings,4:dilations", device = ""} : (tensor<1x3x4x3xf32>, tensor<2x3x3x2xf32>) -> tensor<1x2x2x2xf32>
    Registered: Sun Jun 16 05:45:23 UTC 2024
    - Last Modified: Thu Apr 25 01:09:50 UTC 2024
    - 24.3K bytes
    - Viewed (0)
  8. tensorflow/compiler/mlir/quantization/tensorflow/cc/constant_fold_test.cc

            %w = "tf.Mul"(%cst, %cst_2) : (tensor<2x3x3x1xf32>, tensor<f32>) -> tensor<2x3x3x1xf32>
            %0 = "tf.DepthwiseConv2dNative"(%arg0, %w) {data_format = "NHWC", device = "", dilations = [1, 1, 1, 1], explicit_paddings = [], padding = "SAME", strides = [1, 1, 1, 1]} : (tensor<*xf32>, tensor<2x3x3x1xf32>) -> tensor<?x?x?x3xf32>
    Registered: Sun Jun 16 05:45:23 UTC 2024
    - Last Modified: Thu Apr 04 07:19:09 UTC 2024
    - 10.1K bytes
    - Viewed (0)
  9. tensorflow/compiler/mlir/quantization/tensorflow/python/integration_test/quantize_model_test_base.py

            mean, variance = scale, offset
            out = nn_ops.conv2d(
                input_tensor,
                self.filters,
                strides=strides,
                dilations=dilations,
                padding=padding,
                data_format='NHWC',
            )
            if has_bias:
              out = nn_ops.bias_add(out, self.bias, data_format='NHWC')
            if has_batch_norm:
    Registered: Sun Jun 16 05:45:23 UTC 2024
    - Last Modified: Thu Mar 21 08:51:46 UTC 2024
    - 51.2K bytes
    - Viewed (0)
  10. tensorflow/compiler/mlir/tf2xla/transforms/legalize_tf.cc

          const int64_t dim = GetTensorSpatialDimIndex(num_dims, data_format, i);
          spatial_dim_indices.push_back(dim);
    
          const int64_t dilation = get_int(dilations[dim]);
          rhs_dilations.push_back(dilation);
          const int64_t stride = get_int(strides[dim]);
          window_strides.push_back(stride);
    
          Value pad_low, pad_high;
    Registered: Sun Jun 16 05:45:23 UTC 2024
    - Last Modified: Tue Jun 11 20:00:43 UTC 2024
    - 291.8K bytes
    - Viewed (0)
Back to top