- Sort Score
- Num 10 results
- Language All
Results 31 - 40 of 44 for R2 (0.05 seconds)
-
src/bytes/buffer_test.go
r1, size, _ := buf.ReadRune() if err := buf.UnreadRune(); err != nil { t.Fatalf("UnreadRune(%U) got error %q", r, err) } r2, nbytes, err := buf.ReadRune() if r1 != r2 || r1 != r || nbytes != size || err != nil { t.Fatalf("ReadRune(%U) after UnreadRune got %U,%d not %U,%d (err=%s)", r, r2, nbytes, r, size, err) } } } func TestWriteInvalidRune(t *testing.T) {
Created: Tue Dec 30 11:13:12 GMT 2025 - Last Modified: Fri Nov 14 19:01:17 GMT 2025 - 19.4K bytes - Click Count (0) -
src/bufio/bufio_test.go
r.Reset(strings.NewReader("bar bar")) checkAll(r, "bar bar") // Wrap a reader and then Reset to that reader. r.Reset(strings.NewReader("recur")) r2 := NewReader(r) checkAll(r2, "recur") r.Reset(strings.NewReader("recur2")) r2.Reset(r) checkAll(r2, "recur2") } func TestWriterReset(t *testing.T) { var buf1, buf2, buf3, buf4, buf5 strings.Builder w := NewWriter(&buf1) w.WriteString("foo")
Created: Tue Dec 30 11:13:12 GMT 2025 - Last Modified: Fri Feb 07 01:08:54 GMT 2025 - 51.6K bytes - Click Count (0) -
README.md
apply fixes to bugs or security vulnerabilities: * Clone the TensorFlow repository and switch to the appropriate branch for your desired version—for example, `r2.8` for version 2.8. * Apply the desired changes (i.e., cherry-pick them) and resolve any code conflicts. * Run TensorFlow tests and ensure they pass.Created: Tue Dec 30 12:39:10 GMT 2025 - Last Modified: Fri Jul 18 14:09:03 GMT 2025 - 11.6K bytes - Click Count (0) -
src/cmd/asm/internal/asm/testdata/ppc64.s
OR $0, R0, R0 // 60000000 PCALIGN $16 PNOP // 0700000000000000 SETB CR1,R3 // 7c640100 VCLZLSBB V1,R2 // 10400e02 VCTZLSBB V1,R2 // 10410e02 XSMAXJDP VS1,VS2,VS3 // f0611480 XSMINJDP VS1,VS2,VS3 // f06114c0
Created: Tue Dec 30 11:13:12 GMT 2025 - Last Modified: Thu Nov 21 18:27:17 GMT 2024 - 51.7K bytes - Click Count (0) -
lib/fips140/v1.0.0-c2097c7c.zip
a1×b0 + 19×(a2×b4 + a3×b3 + a4×b2) r1 := mul64(a0, b1) r1 = addMul64(r1, a1, b0) r1 = addMul64(r1, a2_19, b4) r1 = addMul64(r1, a3_19, b3) r1 = addMul64(r1, a4_19, b2) // r2 = a0×b2 + a1×b1 + a2×b0 + 19×(a3×b4 + a4×b3) r2 := mul64(a0, b2) r2 = addMul64(r2, a1, b1) r2 = addMul64(r2, a2, b0) r2 = addMul64(r2, a3_19, b4) r2 = addMul64(r2, a4_19, b3) // r3 = a0×b3 + a1×b2 + a2×b1 + a3×b0 + 19×a4×b4 r3 := mul64(a0, b3) r3 = addMul64(r3, a1, b2) r3 = addMul64(r3, a2, b1) r3 = addMul64(r3, a3, b0) r3 = addMul64(r3,...
Created: Tue Dec 30 11:13:12 GMT 2025 - Last Modified: Thu Sep 25 19:53:19 GMT 2025 - 642.7K bytes - Click Count (0) -
src/cmd/asm/internal/asm/asm.go
// All must be registers. p.getRegister(prog, op, &a[0]) r1 := p.getRegister(prog, op, &a[1]) r2 := p.getRegister(prog, op, &a[2]) p.getRegister(prog, op, &a[3]) prog.From = a[0] prog.To = a[3] prog.To.Type = obj.TYPE_REGREG2 prog.To.Offset = int64(r2) prog.Reg = r1 break } } if p.arch.Family == sys.AMD64 { prog.From = a[0]
Created: Tue Dec 30 11:13:12 GMT 2025 - Last Modified: Tue Oct 21 15:13:08 GMT 2025 - 26.7K bytes - Click Count (0) -
lib/fips140/v1.1.0-rc1.zip
r1 = a0×b1 + a1×b0 + 19×(a2×b4 + a3×b3 + a4×b2) r1 := mul(a0, b1) r1 = addMul(r1, a1, b0) r1 = addMul19(r1, a2, b4) r1 = addMul19(r1, a3, b3) r1 = addMul19(r1, a4, b2) // r2 = a0×b2 + a1×b1 + a2×b0 + 19×(a3×b4 + a4×b3) r2 := mul(a0, b2) r2 = addMul(r2, a1, b1) r2 = addMul(r2, a2, b0) r2 = addMul19(r2, a3, b4) r2 = addMul19(r2, a4, b3) // r3 = a0×b3 + a1×b2 + a2×b1 + a3×b0 + 19×a4×b4 r3 := mul(a0, b3) r3 = addMul(r3, a1, b2) r3 = addMul(r3, a2, b1) r3 = addMul(r3, a3, b0) r3 = addMul19(r3, a4, b4)...
Created: Tue Dec 30 11:13:12 GMT 2025 - Last Modified: Thu Dec 11 16:27:41 GMT 2025 - 663K bytes - Click Count (0) -
src/cmd/asm/internal/asm/testdata/loong64enc1.s
// ADDV C_SCON, [r1], r2 ADDV $0x321, R4 // ADDV $801, R4 // 8484cc02 ADDV $0x321, R5, R4 // ADDV $801, R5, R4 // a484cc02 ADDV $0xfffffffffffffc21, R4 // ADDV $-991, R4 // 8484f002 ADDV $0xfffffffffffffc21, R5, R4 // ADDV $-991, R5, R4 // a484f002 // AND C_SCON, [r1], r2 AND $0x321, R4 // AND $801, R4 // 84844c03
Created: Tue Dec 30 11:13:12 GMT 2025 - Last Modified: Thu Nov 27 00:46:52 GMT 2025 - 44.5K bytes - Click Count (0) -
doc/asm.html
Left shift the immediate value <code>8</code> by <code>12</code> bits. </li> <li> <code>8(R0)</code>: Add the value of <code>R0</code> and <code>8</code>. </li> <li> <code>(R2)(R0)</code>: The location at <code>R0</code> plus <code>R2</code>. </li> <li> <code>R0.UXTB</code> <br> <code>R0.UXTB<<imm</code>:
Created: Tue Dec 30 11:13:12 GMT 2025 - Last Modified: Fri Nov 14 19:09:46 GMT 2025 - 36.5K bytes - Click Count (0) -
RELEASE.md
[`experimental_io_device`](https://www.tensorflow.org/versions/r2.3/api_docs/python/tf/saved_model/LoadOptions?hl=en) as arg with default value `None` to choose the I/O device for loading models and weights. * Update `tf.saved_model.SaveOptions` with [`experimental_io_device`](https://www.tensorflow.org/versions/r2.3/api_docs/python/tf/saved_model/SaveOptions?hl=en)Created: Tue Dec 30 12:39:10 GMT 2025 - Last Modified: Tue Oct 28 22:27:41 GMT 2025 - 740.4K bytes - Click Count (3)