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Results 21 - 30 of 174 for rofl (0.04 sec)
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src/internal/chacha8rand/chacha8_amd64.s
// See chacha8_generic.go for additional details. // ROL rotates the uint32s in register R left by N bits, using temporary T. #define ROL(N, R, T) \ MOVO R, T; PSLLL $(N), T; PSRLL $(32-(N)), R; PXOR T, R // ROL16 rotates the uint32s in register R left by 16, using temporary T if needed. #ifdef GOAMD64_v2 #define ROL16(R, T) PSHUFB ·rol16<>(SB), R #else #define ROL16(R, T) ROL(16, R, T) #endif
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Tue Dec 05 20:34:30 UTC 2023 - 4.6K bytes - Viewed (0) -
src/cmd/internal/obj/arm64/anames7.go
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Mon Jul 31 16:37:49 UTC 2023 - 1.6K bytes - Viewed (0) -
pkg/kubelet/images/types.go
EnsureImageExists(ctx context.Context, pod *v1.Pod, container *v1.Container, pullSecrets []v1.Secret, podSandboxConfig *runtimeapi.PodSandboxConfig, podRuntimeHandler string) (string, string, error) // TODO(ronl): consolidating image managing and deleting operation in this interface
Registered: Sat Jun 15 01:39:40 UTC 2024 - Last Modified: Tue Oct 31 22:52:46 UTC 2023 - 2K bytes - Viewed (0) -
src/crypto/sha1/sha1block_386.s
#define FUNC3(a, b, c, d, e) \ MOVL b, SI; \ ORL c, SI; \ ANDL d, SI; \ MOVL b, DI; \ ANDL c, DI; \ ORL SI, DI #define FUNC4 FUNC2 #define MIX(a, b, c, d, e, const) \ ROLL $30, b; \ ADDL DI, e; \ MOVL a, SI; \ ROLL $5, SI; \ LEAL const(e)(SI*1), e #define ROUND1(a, b, c, d, e, index) \ LOAD(index, e); \ FUNC1(a, b, c, d, e); \ MIX(a, b, c, d, e, 0x5A827999)
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Mon Mar 04 17:29:44 UTC 2024 - 6K bytes - Viewed (0) -
src/cmd/internal/obj/x86/anames.go
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Tue Apr 11 18:32:50 UTC 2023 - 19.1K bytes - Viewed (0) -
api/maven-api-core/src/main/java/org/apache/maven/api/services/TransportProvider.java
* This API does not try to cover all the requirements out there, just the basic ones, and is intentionally simple. * If plugin or extension needs anything more complex feature wise (i.e. HTTP range support or alike) it should * probably roll its own. * <p> * This implementation is backed by Maven Resolver API, supported protocols and transport selection depends on it. If * resolver preference regarding transport is altered, it will affect this service as well. *
Registered: Wed Jun 12 09:55:16 UTC 2024 - Last Modified: Thu Mar 23 05:29:39 UTC 2023 - 2.1K bytes - Viewed (0) -
src/cmd/link/internal/loadmacho/ldmacho.go
// // [For future reference, see Darwin's /usr/include/mach-o/x86_64/reloc.h] secaddr := c.seg.sect[rel.symnum-1].addr rAdd = int64(uint64(int64(int32(e.Uint32(p[rOff:])))+int64(rOff)+4) - secaddr) } else { rAdd = int64(int32(e.Uint32(p[rOff:]))) } } // An unsigned internal relocation has a value offset // by the section address.
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Thu May 12 18:45:57 UTC 2022 - 19.1K bytes - Viewed (0) -
src/internal/zstd/block.go
} r.seqTableBuffers[kind] = r.seqTableBuffers[kind][:1<<tableBits] if err := info.toBaseline(r, roff, r.fseScratch, r.seqTableBuffers[kind]); err != nil { return 0, err } r.seqTables[kind] = r.seqTableBuffers[kind] r.seqTableBits[kind] = uint8(tableBits) return roff, nil case 3: // Repeat_Mode if len(r.seqTables[kind]) == 0 {
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Thu Sep 28 17:57:43 UTC 2023 - 10.2K bytes - Viewed (0) -
src/cmd/link/internal/loadxcoff/ldxcoff.go
rSym := l.LookupOrCreateCgoExport(rx.Symbol.Name, 0) if uint64(int32(rx.VirtualAddress)) != rx.VirtualAddress { return errorf("virtual address of a relocation is too big: 0x%x", rx.VirtualAddress) } rOff := int32(rx.VirtualAddress) var rSize uint8 var rType objabi.RelocType var rAdd int64 switch rx.Type { default: return errorf("section %s: unknown relocation of type 0x%x", sect.Name, rx.Type)
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Thu Dec 14 17:22:18 UTC 2023 - 6.2K bytes - Viewed (0) -
src/crypto/sha1/sha1block_amd64.s
#define FUNC3(a, b, c, d, e) \ MOVL b, R8; \ ORL c, R8; \ ANDL d, R8; \ MOVL b, R9; \ ANDL c, R9; \ ORL R8, R9 #define FUNC4 FUNC2 #define MIX(a, b, c, d, e, const) \ ROLL $30, b; \ ADDL R9, e; \ MOVL a, R8; \ ROLL $5, R8; \ LEAL const(e)(R10*1), e; \ ADDL R8, e #define ROUND1(a, b, c, d, e, index) \ LOAD(index); \ FUNC1(a, b, c, d, e); \ MIX(a, b, c, d, e, 0x5A827999)
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Mon Mar 04 17:29:44 UTC 2024 - 31.5K bytes - Viewed (0)