// representation. The dimensions are indexed using the standard TensorFlow
// major-to-minor order (slowest varying dimension first),
// not the XLA's minor-to-major order.
// On-device dimensions can be padded. TFE_TensorDebugInfoOnDeviceDim returns
// the number of elements in a dimension after padding.
// The return value was current at the time of TFE_TensorDebugInfo creation.

	instructions["MOVDQ2Q"] = x86.AMOVQ
	instructions["MOVNTDQ"] = x86.AMOVNTO
	instructions["MOVOA"] = x86.AMOVO
	instructions["PSLLDQ"] = x86.APSLLO
	instructions["PSRLDQ"] = x86.APSRLO
	instructions["PADDD"] = x86.APADDL
	// Spellings originally used in CL 97235.
	instructions["MOVBELL"] = x86.AMOVBEL
	instructions["MOVBEQQ"] = x86.AMOVBEQ
	instructions["MOVBEWW"] = x86.AMOVBEW

	return &Arch{

$0x00, X7, X7 PCMPEQL X8, X6 PCMPEQL X8, X7 MOVOU X6, X15 PANDN X9, X15 MOVOU (SP), X9 MOVOU 16(SP), X10 MOVOU 32(SP), X11 MOVOU 48(SP), X12 MOVOU 64(SP), X13 MOVOU 80(SP), X14 PAND X15, X0 PAND X15, X1 PAND X15, X2 PAND X15, X3 PAND X15, X4 PAND X15, X5 PAND X6, X9 PAND X6, X10 PAND X6, X11 PAND X6, X12 PAND X6, X13 PAND X6, X14 PXOR X9, X0 PXOR X10, X1 PXOR X11, X2 PXOR X12, X3 PXOR X13, X4 PXOR X14, X5 // Similarly if zero == 0 PCMPEQL X9, X9 MOVOU X7, X15 PANDN X9, X15 MOVOU 96(SP), X9 MOVOU...

	PAND (BX), X2                           // 660fdb13
	PAND (R11), X2                          // 66410fdb13
	PAND X2, X2                             // 660fdbd2
	PAND X11, X2                            // 66410fdbd3
	PAND (BX), X11                          // 66440fdb1b
	PAND (R11), X11                         // 66450fdb1b
	PAND X2, X11                            // 66440fdbda

$0x00, X7, X7 PCMPEQL X8, X6 PCMPEQL X8, X7 MOVOU X6, X15 PANDN X9, X15 MOVOU (SP), X9 MOVOU 16(SP), X10 MOVOU 32(SP), X11 MOVOU 48(SP), X12 MOVOU 64(SP), X13 MOVOU 80(SP), X14 PAND X15, X0 PAND X15, X1 PAND X15, X2 PAND X15, X3 PAND X15, X4 PAND X15, X5 PAND X6, X9 PAND X6, X10 PAND X6, X11 PAND X6, X12 PAND X6, X13 PAND X6, X14 PXOR X9, X0 PXOR X10, X1 PXOR X11, X2 PXOR X12, X3 PXOR X13, X4 PXOR X14, X5 // Similarly if zero == 0 PCMPEQL X9, X9 MOVOU X7, X15 PANDN X9, X15 MOVOU 96(SP), X9 MOVOU...

                setNetbiosName(ctx.getNetbiosName());
                byte[] sk = ctx.getSigningKey();
                if (sk != null) {
                    // session key is truncated to 16 bytes, right padded with 0 if shorter
                    byte[] key = new byte[16];
                    System.arraycopy(sk, 0, key, 0, Math.min(16, sk.length));
                    this.sessionKey = key;
                }

// Code generated by 'instgen -o=$GOROOT # from go install golang.org/x/arch/arm64/instgen@latest'. DO NOT EDIT.

#include "../../../../../runtime/textflag.h"

TEXT asmtest(SB),DUPOK|NOSPLIT,$-8
	PAND P14.S, P13.S, P14.M, P5.D                    // ERROR "illegal combination from SVE"
	PANDS P14.S, P13.S, P14.M, P5.D                   // ERROR "illegal combination from SVE"
	PBIC P14.S, P13.S, P14.M, P5.D                    // ERROR "illegal combination from SVE"

pkg syscall (linux-arm-cgo), type EpollEvent struct, Fd int32
pkg syscall (linux-arm-cgo), type EpollEvent struct, Pad int32
pkg syscall (linux-arm-cgo), type EpollEvent struct, PadFd int32
pkg syscall (linux-arm-cgo), type FdSet struct
pkg syscall (linux-arm-cgo), type FdSet struct, Bits [32]int32
pkg syscall (linux-arm-cgo), type Fsid struct

pkg syscall (linux-arm), type EpollEvent struct, Events uint32
pkg syscall (linux-arm), type EpollEvent struct, Fd int32
pkg syscall (linux-arm), type EpollEvent struct, Pad int32
pkg syscall (linux-arm), type EpollEvent struct, PadFd int32
pkg syscall (linux-arm), type FdSet struct
pkg syscall (linux-arm), type FdSet struct, Bits [32]int32
pkg syscall (linux-arm), type Fsid struct
pkg syscall (linux-arm), type Fsid struct, X__val [2]int32