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build-logic/buildquality/src/test/kotlin/gradlebuild/testcleanup/TestFilesCleanupServiceTest.kt
} fun Project.registerTestWithLeftover() { tasks.register<TestWithLeftover>("test") { binaryResultsDirectory.set(project.layout.buildDirectory.dir("binaryResultsDirectory")) reports.html.outputLocation.set(project.layout.buildDirectory.dir("reports"))Created: Wed Dec 31 11:36:14 GMT 2025 - Last Modified: Wed Jun 18 10:36:40 GMT 2025 - 10.9K bytes - Click Count (0) -
impl/maven-core/src/main/java/org/apache/maven/project/artifact/DefaultProjectArtifactsCache.java
Created: Sun Dec 28 03:35:09 GMT 2025 - Last Modified: Mon Sep 29 14:45:25 GMT 2025 - 8.3K bytes - Click Count (0) -
okhttp-idna-mapping-table/src/main/resources/okhttp3/internal/idna/IdnaMappingTable.txt
# IdnaMappingTable.txt # Date: 2023-08-10, 22:32:27 GMT # © 2023 Unicode®, Inc. # Unicode and the Unicode Logo are registered trademarks of Unicode, Inc. in the U.S. and other countries. # For terms of use, see https://www.unicode.org/terms_of_use.html # # Unicode IDNA Compatible Preprocessing for UTS #46 # Version: 15.1.0 # # For documentation and usage, see https://www.unicode.org/reports/tr46 #
Created: Fri Dec 26 11:42:13 GMT 2025 - Last Modified: Sat Feb 10 11:25:47 GMT 2024 - 854.1K bytes - Click Count (0) -
src/cmd/asm/internal/asm/testdata/loong64enc1.s
VMOVQ V3.W[1], V7.W4 // 67e4f772 VMOVQ V4.V[0], V6.V2 // 86f0f772 // Move vector register to vector register. VMOVQ V1, V9 // 29002d73 VMOVQ V2, V8 // 48002d73 XVMOVQ X3, X7 // 67002d77 XVMOVQ X4, X6 // 86002d77 // Load data from memory and broadcast to each element of a vector register: VMOVQ offset(Rj), <Vd>.<T> VMOVQ (R4), V0.B16 // 80008030 VMOVQ 1(R4), V0.B16 // 80048030
Created: Tue Dec 30 11:13:12 GMT 2025 - Last Modified: Thu Nov 27 00:46:52 GMT 2025 - 44.5K bytes - Click Count (0) -
CHANGELOG/CHANGELOG-1.21.md
Created: Fri Dec 26 09:05:12 GMT 2025 - Last Modified: Fri Oct 14 07:03:14 GMT 2022 - 367.3K bytes - Click Count (0) -
android/guava-tests/test/com/google/common/base/FinalizableReferenceQueueTest.java
private final Cleanable cleanable; MyServerExampleWithCleaner(AtomicBoolean cleanerRan) throws IOException { this.serverSocket = new ServerSocket(0); this.cleanable = cleaner.register(this, closeServerSocketRunnable(serverSocket, cleanerRan)); } @Override public void close() { cleanable.clean(); } } @SuppressWarnings("Java8ApiChecker")Created: Fri Dec 26 12:43:10 GMT 2025 - Last Modified: Thu Dec 11 20:07:52 GMT 2025 - 8.7K bytes - Click Count (0) -
cmd/post-policy_test.go
if err := newTestConfig(globalMinioDefaultRegion, obj); err != nil { t.Fatalf("Initializing config.json failed") } // Register the API end points with Erasure/FS object layer. apiRouter := initTestAPIEndPoints(obj, []string{"PostPolicy"}) credentials := globalActiveCred bucketName := minioMetaBucket objectName := "config/x"
Created: Sun Dec 28 19:28:13 GMT 2025 - Last Modified: Fri Aug 29 02:39:48 GMT 2025 - 30.6K bytes - Click Count (0) -
okhttp-tls/src/main/kotlin/okhttp3/tls/internal/der/CertificateAdapters.kt
* ediPartyName [5] EDIPartyName, * uniformResourceIdentifier [6] IA5String, * iPAddress [7] OCTET STRING, * registeredID [8] OBJECT IDENTIFIER * } * ``` * * The first property of the pair is the adapter that was used, the second property is the value. */
Created: Fri Dec 26 11:42:13 GMT 2025 - Last Modified: Wed Mar 19 19:25:20 GMT 2025 - 13.6K bytes - Click Count (0) -
src/cmd/asm/internal/asm/testdata/riscv64.s
CSRLI $63, X10 // 7d91 CSRAI $63, X10 // 7d95 CAND $-32, X10 // 0199 CAND $31, X10 // 7d89 CANDI $-32, X10 // 0199 CANDI $31, X10 // 7d89 // 26.5.3: Compressed Integer Register-Register Operations CMV X6, X5 // 9a82 CADD X9, X8 // 2694 CAND X9, X8 // 658c COR X9, X8 // 458c CXOR X9, X8 // 258c CSUB X9, X8 // 058c CADDW X9, X8 // 259c
Created: Tue Dec 30 11:13:12 GMT 2025 - Last Modified: Thu Nov 13 12:17:37 GMT 2025 - 73.7K bytes - Click Count (0) -
src/cmd/asm/internal/arch/arm.go
(op1 << 20) | // MCR/MRC ((int64(bits) ^ arm.C_SCOND_XOR) << 28) | // scond ((x0 & 15) << 8) | //coprocessor number ((x1 & 7) << 21) | // coprocessor operation ((x2 & 15) << 12) | // ARM register ((x3 & 15) << 16) | // Crn ((x4 & 15) << 0) | // Crm ((x5 & 7) << 5) | // coprocessor information (1 << 4) /* must be set */ return offset, arm.AMRC, true }
Created: Tue Dec 30 11:13:12 GMT 2025 - Last Modified: Wed Oct 23 15:18:14 GMT 2024 - 6.1K bytes - Click Count (0)