// TODO(rsc): Test to ensure Intel manuals are correct and report to libopcodes maintainers?
		// NOTE: iant thinks this is deliberate, but we can't find the history.
		_, reg1 := inst.Args[0].(Reg)
		_, reg2 := inst.Args[1].(Reg)
		if reg1 && reg2 && (inst.Opcode>>24 == 0xDC || inst.Opcode>>24 == 0xDE) {
			switch inst.Op {
			case FDIV:
				inst.Op = FDIVR
			case FDIVR:
				inst.Op = FDIV
			case FSUB:

	if REG_AL <= r && r-REG_AL < len(Register) {
		return Register[r-REG_AL]
	}
	return fmt.Sprintf("Rgok(%d)", r-obj.RBaseAMD64)
}

func rlconv(bits int64) string {
	reg0, reg1 := decodeRegisterRange(bits)
	return fmt.Sprintf("[%s-%s]", rconv(reg0), rconv(reg1))
}

func opSuffixString(s uint8) string {
	return "." + opSuffix(s).String()

// Copyright 2015 The Go Authors. All rights reserved.
// Use of this source code is governed by a BSD-style
// license that can be found in the LICENSE file.

package ppc64

var cnames9 = []string{
	"NONE",
	"REGP",
	"REG",
	"FREGP",
	"FREG",
	"VREG",
	"VSREGP",
	"VSREG",
	"CREG",
	"CRBIT",
	"SPR",
	"MREG",
	"ZCON",
	"U1CON",
	"U2CON",
	"U3CON",
	"U4CON",
	"U5CON",
	"U8CON",
	"U15CON",

			p.Pos = q1.Pos
			p.From.Type = obj.TYPE_REG
			p.From.Reg = q1.From.Reg
			p.To.Type = obj.TYPE_MEM
			p.To.Reg = REGTMP
			p.To.Offset = 8 * 4 // offset of m.divmod

			/* MOV b, R8 */
			p = obj.Appendp(p, newprog)
			p.As = AMOVW
			p.Pos = q1.Pos
			p.From.Type = obj.TYPE_REG
			p.From.Reg = q1.Reg
			if q1.Reg == 0 {
				p.From.Reg = q1.To.Reg
			}
			p.To.Type = obj.TYPE_REG
			p.To.Reg = REG_R8

				q.As = AMOVD
				q.From.Type = obj.TYPE_MEM
				q.From.Reg = REGG
				q.From.Offset = 4 * int64(c.ctxt.Arch.PtrSize) // G.panic
				q.To.Type = obj.TYPE_REG
				q.To.Reg = REGRT1

				// CBNZ RT1, checkargp
				cbnz := obj.Appendp(q, c.newprog)
				cbnz.As = ACBNZ
				cbnz.From.Type = obj.TYPE_REG
				cbnz.From.Reg = REGRT1
				cbnz.To.Type = obj.TYPE_BRANCH

			}

			if v.reg.clobbers > 0 {
				fmt.Fprintf(w, "clobbers: %d,%s\n", v.reg.clobbers, a.regMaskComment(v.reg.clobbers))
			}

			// reg outputs
			s = s[:0]
			for i, r := range v.reg.outputs {
				s = append(s, intPair{countRegs(r), i})
			}
			if len(s) > 0 {
				sort.Sort(byKey(s))
				fmt.Fprintln(w, "outputs: []outputInfo{")
				for _, p := range s {
					r := v.reg.outputs[p.val]

func (c *sigctxt) r7() uint64  { return c.regs().gpr[7] }
func (c *sigctxt) r8() uint64  { return c.regs().gpr[8] }
func (c *sigctxt) r9() uint64  { return c.regs().gpr[9] }
func (c *sigctxt) r10() uint64 { return c.regs().gpr[10] }
func (c *sigctxt) r11() uint64 { return c.regs().gpr[11] }
func (c *sigctxt) r12() uint64 { return c.regs().gpr[12] }
func (c *sigctxt) r13() uint64 { return c.regs().gpr[13] }

func (c *sigctxt) r14() uint64 { return c.regs().sc_reg[14] }
func (c *sigctxt) r15() uint64 { return c.regs().sc_reg[15] }
func (c *sigctxt) r16() uint64 { return c.regs().sc_reg[16] }
func (c *sigctxt) r17() uint64 { return c.regs().sc_reg[17] }
func (c *sigctxt) r18() uint64 { return c.regs().sc_reg[18] }
func (c *sigctxt) r19() uint64 { return c.regs().sc_reg[19] }
func (c *sigctxt) r20() uint64 { return c.regs().sc_reg[20] }

func (c *sigctxt) r7() uint32  { return c.regs().r7 }
func (c *sigctxt) r8() uint32  { return c.regs().r8 }
func (c *sigctxt) r9() uint32  { return c.regs().r9 }
func (c *sigctxt) r10() uint32 { return c.regs().r10 }
func (c *sigctxt) fp() uint32  { return c.regs().fp }
func (c *sigctxt) ip() uint32  { return c.regs().ip }
func (c *sigctxt) sp() uint32  { return c.regs().sp }

func (c *sigctxt) r5() uint64  { return c.regs().__gregs[_REG_X5] }
func (c *sigctxt) r6() uint64  { return c.regs().__gregs[_REG_X6] }
func (c *sigctxt) r7() uint64  { return c.regs().__gregs[_REG_X7] }
func (c *sigctxt) r8() uint64  { return c.regs().__gregs[_REG_X8] }
func (c *sigctxt) r9() uint64  { return c.regs().__gregs[_REG_X9] }
func (c *sigctxt) r10() uint64 { return c.regs().__gregs[_REG_X10] }