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Results 1 - 10 of 15 for PUSHQ (0.03 sec)
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src/runtime/cgo/gcc_amd64.S
* The standard x86-64 ABI passes the three arguments m, g, fn * in %rdi, %rsi, %rdx. */ .globl EXT(crosscall1) EXT(crosscall1): pushq %rbx pushq %rbp pushq %r12 pushq %r13 pushq %r14 pushq %r15 #if defined(_WIN64) movq %r8, %rdi /* arg of setg_gcc */ call *%rdx /* setg_gcc */ call *%rcx /* fn */ #else movq %rdi, %rbx movq %rdx, %rdi /* arg of setg_gcc */
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Sat Aug 12 03:56:28 UTC 2023 - 1.1K bytes - Viewed (0) -
src/cmd/internal/obj/x86/seh.go
return } // This implementation expects the following function prologue layout: // - Stack split code (optional) // - PUSHQ BP // - MOVQ SP, BP // // If the prologue layout change, the unwind information should be updated // accordingly. // Search for the PUSHQ BP instruction inside the prologue. var pushbp *obj.Prog for p := s.Func().Text; p != nil; p = p.Link {
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Wed May 15 14:41:10 UTC 2024 - 4.6K bytes - Viewed (0) -
src/runtime/preempt_amd64.s
// Code generated by mkpreempt.go; DO NOT EDIT. #include "go_asm.h" #include "asm_amd64.h" #include "textflag.h" TEXT ·asyncPreempt(SB),NOSPLIT|NOFRAME,$0-0 PUSHQ BP MOVQ SP, BP // Save flags before clobbering them PUSHFQ // obj doesn't understand ADD/SUB on SP, but does understand ADJSP ADJSP $368 // But vet doesn't know ADJSP, so suppress vet stack checking NOP SP MOVQ AX, 0(SP) MOVQ CX, 8(SP) MOVQ DX, 16(SP)
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Thu Aug 18 17:17:01 UTC 2022 - 1.7K bytes - Viewed (0) -
src/runtime/libfuzzer_amd64.s
MOVQ $end_of_function<>(SB), BX PUSHQ BX // Load the starting address of the return sled into BX. MOVQ $ret_sled<>(SB), BX // Load the address of the i'th return instruction from the return sled. // The index is given in the fakePC argument. ADDQ R8, BX PUSHQ BX // Call the original function with the fakePC return address on the stack.
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Wed May 10 04:57:07 UTC 2023 - 5K bytes - Viewed (0) -
src/runtime/race_amd64.s
MOVQ g(R12), R14 MOVQ g_m(R14), R13 MOVQ m_g0(R13), R15 CMPQ R13, R15 JEQ noswitch // branch if already on g0 MOVQ R15, g(R12) // g = m->g0 MOVQ R15, R14 // set g register PUSHQ RARG1 // func arg PUSHQ RARG0 // func arg CALL runtime·racecallback(SB) POPQ R12 POPQ R12 // All registers are smashed after Go code, reload. get_tls(R12) MOVQ g(R12), R13 MOVQ g_m(R13), R13
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Fri May 17 18:37:29 UTC 2024 - 15.1K bytes - Viewed (0) -
src/syscall/asm_linux_amd64.s
MOVQ a1+8(FP), DI MOVQ a2+16(FP), SI MOVQ a3+24(FP), DX MOVQ $0, R10 MOVQ $0, R8 MOVQ $0, R9 MOVQ trap+0(FP), AX // syscall entry POPQ R12 // preserve return address SYSCALL PUSHQ R12 CMPQ AX, $0xfffffffffffff001 JLS ok2 MOVQ $-1, r1+32(FP) NEGQ AX MOVQ AX, err+40(FP) RET ok2: MOVQ AX, r1+32(FP) MOVQ $0, err+40(FP) RET
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Thu Sep 07 19:11:15 UTC 2023 - 1.3K bytes - Viewed (0) -
src/cmd/asm/internal/asm/testdata/amd64dynlinkerror.s
CMPL runtime·writeBarrier(SB), $0 XORQ R15, R15 RET TEXT ·a5(SB), 0, $0-0 CMPL runtime·writeBarrier(SB), $0 XORL R15, R15 RET TEXT ·a6(SB), 0, $0-0 CMPL runtime·writeBarrier(SB), $0 POPQ R15 PUSHQ R15 RET TEXT ·a7(SB), 0, $0-0 CMPL runtime·writeBarrier(SB), $0 MOVQ R15, AX // ERROR "when dynamic linking, R15 is clobbered by a global variable access and is used here" RET TEXT ·a8(SB), 0, $0-0
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Wed Mar 15 20:45:41 UTC 2023 - 4.8K bytes - Viewed (0) -
src/runtime/sys_solaris_amd64.s
// section 3.2.3. // // Called by runtime·asmcgocall or runtime·cgocall. // NOT USING GO CALLING CONVENTION. TEXT runtime·asmsysvicall6(SB),NOSPLIT,$0 // asmcgocall will put first argument into DI. PUSHQ DI // save for later MOVQ libcall_fn(DI), AX MOVQ libcall_args(DI), R11 MOVQ libcall_n(DI), R10 get_tls(CX) MOVQ g(CX), BX CMPQ BX, $0 JEQ skiperrno1 MOVQ g_m(BX), BX
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Fri Apr 21 19:29:00 UTC 2023 - 6.4K bytes - Viewed (0) -
src/cmd/vendor/golang.org/x/arch/x86/x86asm/plan9x.go
} op := inst.Op.String() if plan9Suffix[inst.Op] { s := inst.DataSize if inst.MemBytes != 0 { s = inst.MemBytes * 8 } else if inst.Args[1] == nil { // look for register-only 64-bit instruction, like PUSHQ AX if r, ok := inst.Args[0].(Reg); ok && RAX <= r && r <= R15 { s = 64 } } switch s { case 8: op += "B" case 16: op += "W" case 32: op += "L" case 64: op += "Q"
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Wed Jul 12 20:38:21 UTC 2023 - 7.2K bytes - Viewed (0) -
src/cmd/link/internal/amd64/asm.go
log.Fatalf("unexpected relocation variant") return -1 } func elfsetupplt(ctxt *ld.Link, ldr *loader.Loader, plt, got *loader.SymbolBuilder, dynamic loader.Sym) { if plt.Size() == 0 { // pushq got+8(IP) plt.AddUint8(0xff) plt.AddUint8(0x35) plt.AddPCRelPlus(ctxt.Arch, got.Sym(), 8) // jmpq got+16(IP) plt.AddUint8(0xff) plt.AddUint8(0x25)
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Wed Aug 23 05:58:20 UTC 2023 - 21K bytes - Viewed (0)