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WORKSPACE
tf_workspace0() load( "@local_tsl//third_party/gpus/cuda/hermetic:cuda_json_init_repository.bzl", "cuda_json_init_repository", ) cuda_json_init_repository() load( "@cuda_redist_json//:distributions.bzl", "CUDA_REDISTRIBUTIONS", "CUDNN_REDISTRIBUTIONS", ) load( "@local_tsl//third_party/gpus/cuda/hermetic:cuda_redist_init_repositories.bzl", "cuda_redist_init_repositories",
Registered: Tue Nov 05 12:39:12 UTC 2024 - Last Modified: Fri Oct 11 16:49:28 UTC 2024 - 3K bytes - Viewed (0) -
ci/official/envs/linux_x86_cuda_build
TFCI_BAZEL_COMMON_ARGS="--repo_env=HERMETIC_PYTHON_VERSION=$TFCI_PYTHON_VERSION --config release_gpu_linux" TFCI_BAZEL_TARGET_SELECTING_CONFIG_PREFIX=linux_cuda TFCI_BUILD_PIP_PACKAGE_ARGS="--repo_env=WHEEL_NAME=tensorflow" TFCI_DOCKER_ARGS="--gpus all" TFCI_LIB_SUFFIX="-gpu-linux-x86_64"
Registered: Tue Nov 05 12:39:12 UTC 2024 - Last Modified: Mon Oct 28 17:57:41 UTC 2024 - 1.1K bytes - Viewed (0) -
ci/official/envs/linux_x86_cuda
TFCI_BAZEL_COMMON_ARGS="--repo_env=HERMETIC_PYTHON_VERSION=$TFCI_PYTHON_VERSION --config release_gpu_linux" TFCI_BAZEL_TARGET_SELECTING_CONFIG_PREFIX=linux_cuda TFCI_BUILD_PIP_PACKAGE_ARGS="--repo_env=WHEEL_NAME=tensorflow" TFCI_DOCKER_ARGS="--gpus all" TFCI_LIB_SUFFIX="-gpu-linux-x86_64"
Registered: Tue Nov 05 12:39:12 UTC 2024 - Last Modified: Mon Oct 14 23:45:36 UTC 2024 - 1K bytes - Viewed (0) -
SECURITY.md
### Hardware attacks Physical GPUs or TPUs can also be the target of attacks. [Published research](https://scholar.google.com/scholar?q=gpu+side+channel) shows that it might be possible to use side channel attacks on the GPU to leak data from other running models or processes in the same system. GPUs can also have implementation bugs that might allow attackers to leave malicious code running
Registered: Tue Nov 05 12:39:12 UTC 2024 - Last Modified: Wed Oct 16 16:10:43 UTC 2024 - 9.6K bytes - Viewed (0) -
CITATION.cff
represent computation, shared state, and the operations that mutate that state. It maps the nodes of a dataflow graph across many machines in a cluster, and within a machine across multiple computational devices, including multicore CPUs, general purpose GPUs, and custom-designed ASICs known as Tensor Processing Units (TPUs). This architecture gives flexibility to the application developer, whereas in previous “parameter server” designs the management of shared state is built into the system, TensorFlow...
Registered: Tue Nov 05 12:39:12 UTC 2024 - Last Modified: Mon Sep 06 15:26:23 UTC 2021 - 3.5K bytes - Viewed (0) -
tensorflow/c/eager/c_api_test_util.h
tensorflow::ServerDef GetServerDef(int num_tasks); // Create a multi-client ServerDef with the given `job_name`, add `num_tasks` // tasks and `num_virtual_gpus` virtual GPUs in it. tensorflow::ServerDef GetMultiClientServerDef(const std::string& job_name, int num_tasks, int num_virtual_gpus = 0);
Registered: Tue Nov 05 12:39:12 UTC 2024 - Last Modified: Mon Jul 17 23:43:59 UTC 2023 - 7.7K bytes - Viewed (0) -
configure.py
Args: environ_cp: copy of the os.environ. var_name: string for name of environment variable, e.g. "TF_NEED_CUDA". query_item: string for feature related to the variable, e.g. "CUDA for Nvidia GPUs". enabled_by_default: boolean for default behavior. question: optional string for how to ask for user input. yes_reply: optional string for reply when feature is enabled.
Registered: Tue Nov 05 12:39:12 UTC 2024 - Last Modified: Wed Oct 02 22:16:02 UTC 2024 - 48.2K bytes - Viewed (0) -
.bazelrc
# See https://developer.nvidia.com/cuda-gpus#compute # `compute_XY` enables PTX embedding in addition to SASS. PTX # is forward compatible beyond the current compute capability major # release while SASS is only forward compatible inside the current # major release. Example: sm_80 kernels can run on sm_89 GPUs but # not on sm_90 GPUs. compute_80 kernels though can also run on sm_90 GPUs.
Registered: Tue Nov 05 12:39:12 UTC 2024 - Last Modified: Mon Oct 28 22:02:31 UTC 2024 - 51.3K bytes - Viewed (0) -
tensorflow/c/c_test_util.cc
TF_SetAttrType(desc, "T", TF_INT32); // Set device to CPU since there is no version of split for int32 on GPU // TODO(iga): Convert all these helpers and tests to use floats because // they are usually available on GPUs. After doing this, remove TF_SetDevice // call in c_api_function_test.cc TF_SetDevice(desc, "/cpu:0"); *op = TF_FinishOperation(desc, s); ASSERT_EQ(TF_OK, TF_GetCode(s)) << TF_Message(s);
Registered: Tue Nov 05 12:39:12 UTC 2024 - Last Modified: Fri Oct 15 03:16:52 UTC 2021 - 17.8K bytes - Viewed (0) -
RELEASE.md
on Ampere based GPUs.TensorFloat-32, or TF32 for short, is a math mode for NVIDIA Ampere based GPUs which causes certain float32 ops, such as matrix multiplications and convolutions, to run much faster on Ampere GPUs but with reduced precision. This reduced precision has not been
Registered: Tue Nov 05 12:39:12 UTC 2024 - Last Modified: Tue Oct 22 14:33:53 UTC 2024 - 735.3K bytes - Viewed (0)