return kQuantizedInferenceEfficiency;
  }
  return 1.0;
}

// CPU hardware class which handles CPU capabilities in TFLite.
// This is used by TAC to get op supported/ op cost estimates on CPU.
class CpuHardware : public TargetHardware {
 public:
  MLIR_DEFINE_EXPLICIT_INTERNAL_INLINE_TYPE_ID(CpuHardware)

  // String Identifier for CPU hardware.
  static constexpr char kId[] = "CPU";

// IsNaN reports whether f is an IEEE 754 “not-a-number” value.
func IsNaN(f float64) (is bool) {
	// IEEE 754 says that only NaNs satisfy f != f.
	// To avoid the floating-point hardware, could use:
	//	x := Float64bits(f);
	//	return uint32(x>>shift)&mask == mask && x != uvinf && x != uvneginf
	return f != f
}

// IsInf reports whether f is an infinity, according to sign.

       * Refer [linux setup guide](https://www.tensorflow.org/install/gpu#linux_setup).
     * If error still persists then, apparently your CPU model does not support AVX instruction sets.
       * Refer [hardware requirements](https://www.tensorflow.org/install/pip#hardware-requirements).
   
   -----------------------------------------------------------------------------------------------
   
   **2. Installing **TensorFlow** (TF) CPU prebuilt binaries**
   

    ],
    alwayslink = 1,
)

tf_cc_binary(
    name = "example-hardware-translate",
    deps = [
        ":example_hardware",
        "//tensorflow/compiler/mlir/lite/experimental/tac:tac-translate-lib",
        "//tensorflow/compiler/mlir/lite/experimental/tac/hardwares:all-target-hardwares",
    ],

==============================================================================*/

/* NNAPI Hardware Implementation */
#ifndef TENSORFLOW_COMPILER_MLIR_LITE_EXPERIMENTAL_TAC_HARDWARES_NNAPI_HARDWARE_H_
#define TENSORFLOW_COMPILER_MLIR_LITE_EXPERIMENTAL_TAC_HARDWARES_NNAPI_HARDWARE_H_

#include "tensorflow/compiler/mlir/lite/experimental/tac/hardwares/simple_hardware.h"

namespace mlir {
namespace TFL {
namespace tac {

// Copyright 2020 The Go Authors. All rights reserved.
// Use of this source code is governed by a BSD-style
// license that can be found in the LICENSE file.

// Package sysinfo implements high level hardware information gathering
// that can be used for debugging or information purposes.
package sysinfo

import (
	"internal/cpu"
	"sync"
)

var CPUName = sync.OnceValue(func() string {
	if name := cpu.Name(); name != "" {
		return name

          expected_subgraph_metadata->op_metadata()->GetAs<OpMetadata>(j);
      EXPECT_EQ(result_op_metadata->index(), expected_op_metadata->index());
      EXPECT_EQ(result_op_metadata->hardware(),
                expected_op_metadata->hardware());

      EXPECT_EQ(result_op_metadata->op_costs()->size(),
                expected_op_metadata->op_costs()->size());
      for (int i = 0; i < result_op_metadata->op_costs()->size(); ++i) {

package runtime

import "internal/cpu"

func archauxv(tag, val uintptr) {
	switch tag {
	case _AT_HWCAP:
		// ppc64x doesn't have a 'cpuid' instruction
		// equivalent and relies on HWCAP/HWCAP2 bits for
		// hardware capabilities.
		cpu.HWCap = uint(val)
	case _AT_HWCAP2:
		cpu.HWCap2 = uint(val)
	}
}

//
// https://git.kernel.org/?p=linux/kernel/git/torvalds/linux-2.6.git;a=commit;h=b49c0f24cf6744a3f4fd09289fe7cade349dead5
//
TEXT cas<>(SB),NOSPLIT,$0
	MOVW	$0xffff0fc0, R15 // R15 is hardware PC.

TEXT ·Cas(SB),NOSPLIT|NOFRAME,$0
	MOVB	runtime·goarm(SB), R11
	CMP	$7, R11
	BLT	2(PC)
	JMP	·armcas(SB)
	JMP	kernelcas<>(SB)

TEXT kernelcas<>(SB),NOSPLIT,$0
	MOVW	ptr+0(FP), R2

#define TENSORFLOW_COMPILER_MLIR_LITE_EXPERIMENTAL_TAC_HARDWARES_GPU_HARDWARE_H_

#include "tensorflow/compiler/mlir/lite/experimental/tac/hardwares/target_hardware.h"
#include "tensorflow/compiler/mlir/lite/ir/tfl_ops.h"

namespace mlir {
namespace TFL {
namespace tac {
// Gpu hardware class which handles GPU capabilities in TFLite.
// This is used by TAC to get op supported/ op cost estimates on GPU.