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Results 1 - 10 of 17 for is32BitInt (0.37 sec)
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src/cmd/compile/internal/ssa/_gen/PPC64.rules
// Lowering loads (Load <t> ptr mem) && (is64BitInt(t) || isPtr(t)) => (MOVDload ptr mem) (Load <t> ptr mem) && is32BitInt(t) && t.IsSigned() => (MOVWload ptr mem) (Load <t> ptr mem) && is32BitInt(t) && !t.IsSigned() => (MOVWZload ptr mem) (Load <t> ptr mem) && is16BitInt(t) && t.IsSigned() => (MOVHload ptr mem) (Load <t> ptr mem) && is16BitInt(t) && !t.IsSigned() => (MOVHZload ptr mem)
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Fri Jun 07 19:02:52 UTC 2024 - 53.2K bytes - Viewed (0) -
src/cmd/compile/internal/ssa/_gen/LOONG64.rules
(Load <t> ptr mem) && (is16BitInt(t) && t.IsSigned()) => (MOVHload ptr mem) (Load <t> ptr mem) && (is16BitInt(t) && !t.IsSigned()) => (MOVHUload ptr mem) (Load <t> ptr mem) && (is32BitInt(t) && t.IsSigned()) => (MOVWload ptr mem) (Load <t> ptr mem) && (is32BitInt(t) && !t.IsSigned()) => (MOVWUload ptr mem) (Load <t> ptr mem) && (is64BitInt(t) || isPtr(t)) => (MOVVload ptr mem) (Load <t> ptr mem) && is32BitFloat(t) => (MOVFload ptr mem)
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Tue Nov 21 19:26:25 UTC 2023 - 31.8K bytes - Viewed (0) -
src/cmd/compile/internal/ssa/_gen/RISCV64.rules
(Load <t> ptr mem) && (is16BitInt(t) && t.IsSigned()) => (MOVHload ptr mem) (Load <t> ptr mem) && (is16BitInt(t) && !t.IsSigned()) => (MOVHUload ptr mem) (Load <t> ptr mem) && (is32BitInt(t) && t.IsSigned()) => (MOVWload ptr mem) (Load <t> ptr mem) && (is32BitInt(t) && !t.IsSigned()) => (MOVWUload ptr mem) (Load <t> ptr mem) && (is64BitInt(t) || isPtr(t)) => (MOVDload ptr mem)
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Thu Mar 07 14:57:07 UTC 2024 - 40.3K bytes - Viewed (0) -
src/cmd/compile/internal/ssa/rewriteAMD64.go
// result: (CMOVLLT y x cond) for { t := v.Type x := v_0 y := v_1 if v_2.Op != OpAMD64SETL { break } cond := v_2.Args[0] if !(is32BitInt(t)) { break } v.reset(OpAMD64CMOVLLT) v.AddArg3(y, x, cond) return true } // match: (CondSelect <t> x y (SETG cond)) // cond: is32BitInt(t) // result: (CMOVLGT y x cond)
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Tue Mar 12 19:38:41 UTC 2024 - 712.7K bytes - Viewed (0) -
src/cmd/compile/internal/ssa/_gen/AMD64.rules
(Less(32|64)F x y) => (SETGF (UCOMIS(S|D) y x)) (Leq(32|64)F x y) => (SETGEF (UCOMIS(S|D) y x)) // Lowering loads (Load <t> ptr mem) && (is64BitInt(t) || isPtr(t)) => (MOVQload ptr mem) (Load <t> ptr mem) && is32BitInt(t) => (MOVLload ptr mem) (Load <t> ptr mem) && is16BitInt(t) => (MOVWload ptr mem) (Load <t> ptr mem) && (t.IsBoolean() || is8BitInt(t)) => (MOVBload ptr mem) (Load <t> ptr mem) && is32BitFloat(t) => (MOVSSload ptr mem)
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Tue Mar 12 19:38:41 UTC 2024 - 93.9K bytes - Viewed (0) -
src/cmd/compile/internal/ssa/_gen/S390X.rules
// Lowering loads (Load <t> ptr mem) && (is64BitInt(t) || isPtr(t)) => (MOVDload ptr mem) (Load <t> ptr mem) && is32BitInt(t) && t.IsSigned() => (MOVWload ptr mem) (Load <t> ptr mem) && is32BitInt(t) && !t.IsSigned() => (MOVWZload ptr mem) (Load <t> ptr mem) && is16BitInt(t) && t.IsSigned() => (MOVHload ptr mem) (Load <t> ptr mem) && is16BitInt(t) && !t.IsSigned() => (MOVHZload ptr mem)
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Thu Oct 12 18:09:26 UTC 2023 - 74.3K bytes - Viewed (0) -
src/cmd/compile/internal/ssa/rewriteLOONG64.go
} // match: (Load <t> ptr mem) // cond: (is32BitInt(t) && t.IsSigned()) // result: (MOVWload ptr mem) for { t := v.Type ptr := v_0 mem := v_1 if !(is32BitInt(t) && t.IsSigned()) { break } v.reset(OpLOONG64MOVWload) v.AddArg2(ptr, mem) return true } // match: (Load <t> ptr mem) // cond: (is32BitInt(t) && !t.IsSigned()) // result: (MOVWUload ptr mem)
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Tue Nov 21 19:26:25 UTC 2023 - 195.8K bytes - Viewed (0) -
src/cmd/compile/internal/ssa/rewritePPC64.go
} // match: (Load <t> ptr mem) // cond: is32BitInt(t) && t.IsSigned() // result: (MOVWload ptr mem) for { t := v.Type ptr := v_0 mem := v_1 if !(is32BitInt(t) && t.IsSigned()) { break } v.reset(OpPPC64MOVWload) v.AddArg2(ptr, mem) return true } // match: (Load <t> ptr mem) // cond: is32BitInt(t) && !t.IsSigned() // result: (MOVWZload ptr mem)
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Fri Jun 07 19:02:52 UTC 2024 - 360.2K bytes - Viewed (0) -
src/cmd/compile/internal/ssa/_gen/ARM64.rules
(Load <t> ptr mem) && (is16BitInt(t) && t.IsSigned()) => (MOVHload ptr mem) (Load <t> ptr mem) && (is16BitInt(t) && !t.IsSigned()) => (MOVHUload ptr mem) (Load <t> ptr mem) && (is32BitInt(t) && t.IsSigned()) => (MOVWload ptr mem) (Load <t> ptr mem) && (is32BitInt(t) && !t.IsSigned()) => (MOVWUload ptr mem) (Load <t> ptr mem) && (is64BitInt(t) || isPtr(t)) => (MOVDload ptr mem) (Load <t> ptr mem) && is32BitFloat(t) => (FMOVSload ptr mem)
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Thu May 23 15:49:20 UTC 2024 - 113.1K bytes - Viewed (0) -
src/cmd/compile/internal/ssa/rewriteRISCV64.go
} // match: (Load <t> ptr mem) // cond: (is32BitInt(t) && t.IsSigned()) // result: (MOVWload ptr mem) for { t := v.Type ptr := v_0 mem := v_1 if !(is32BitInt(t) && t.IsSigned()) { break } v.reset(OpRISCV64MOVWload) v.AddArg2(ptr, mem) return true } // match: (Load <t> ptr mem) // cond: (is32BitInt(t) && !t.IsSigned()) // result: (MOVWUload ptr mem)
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Thu Mar 07 14:57:07 UTC 2024 - 205.1K bytes - Viewed (0)