00001e0 85 9d 8f b6 d7 88 07 4a 86 03 db 64 f3 d9 92 73
00001f0 df ec a7 fc 23 4c 8d 83 79 63 2a d9 fd 8d b3 c8
0000200 8f 7e d4 19 85 e6 8d 1c 76 f0 8b 58 32 fd 9a d6
0000210 85 e2 48 ad c3 d5 60 6f 7e 22 dd ef 09 49 7c 7f
0000220 3a 45 c3 71 b7 df f3 4c 63 fb b5 d9 31 5f 6e d6
0000230 24 1d a4 4a fe 32 a7 5c 16 48 5c 3e 08 6b 8a d3
0000240 25 1d a2 12 a5 59 24 ea 20 5f 52 6d ad 94 db 6b

	names := []string{
		"0/1/2/3/4/5/6/7/8/9/10/11/12/13/14/15/16/17/18/19/20/21/22/23/24/25/26/27/28/29/30/file.txt",
		"0/1/2/3/4/5/6/7/8/9/10/11/12/13/14/15/16/17/18/19/20/21/22/23/24/25/26/27/28/29/30/31/32/33/file.txt",
		"0/1/2/3/4/5/6/7/8/9/10/11/12/13/14/15/16/17/18/19/20/21/22/23/24/25/26/27/28/29/30/31/32/333/file.txt",
		"0/1/2/3/4/5/6/7/8/9/10/11/12/13/14/15/16/17/18/19/20/21/22/23/24/25/26/27/28/29/30/31/32/33/34/35/36/37/38/39/40/file.txt",

	ADDW	$1, R2, R3
	ADDW	R1, R2, R3
	ADDW	R1, ZR, R3
	ADD	$1, R2, R3
	ADD	R1, R2, R3
	ADD	R1, ZR, R3
	ADD	$1, R2, R3
	ADDW	$1, R2
	ADDW	R1, R2
	ADD	$1, R2
	ADD	R1, R2
	ADD	R1>>11, R2
	ADD	R1<<22, R2
	ADD	R1->33, R2
	ADD	$0x000aaa, R2, R3               // ADD $2730, R2, R3                      // 43a82a91
	ADD	$0x000aaa, R2                   // ADD $2730, R2                          // 42a82a91

pkg debug/dwarf, const AttrDefaultValue = 30
pkg debug/dwarf, const AttrDescription = 90
pkg debug/dwarf, const AttrDiscr = 21
pkg debug/dwarf, const AttrDiscrList = 61
pkg debug/dwarf, const AttrDiscrValue = 22
pkg debug/dwarf, const AttrEncoding = 62
pkg debug/dwarf, const AttrEntrypc = 82
pkg debug/dwarf, const AttrExtension = 84
pkg debug/dwarf, const AttrExternal = 63
pkg debug/dwarf, const AttrFrameBase = 64

	if _, err := f.zipr.ReadAt(buf[:], f.headerOffset); err != nil {
		return 0, err
	}
	b := readBuf(buf[:])
	if sig := b.uint32(); sig != fileHeaderSignature {
		return 0, ErrFormat
	}
	b = b[22:] // skip over most of the header
	filenameLen := int(b.uint16())
	extraLen := int(b.uint16())
	return int64(fileHeaderLen + filenameLen + extraLen), nil
}

	// the base register of shift operations must be general register.
	if reg > arm64.REG_R31 || reg < arm64.REG_R0 {
		return 0, errors.New("invalid register for shift operation")
	}
	return int64(reg&31)<<16 | int64(op)<<22 | int64(uint16(count)), nil
}

// ARM64RegisterExtension constructs an ARM64 register with extension or arrangement.
func ARM64RegisterExtension(a *obj.Addr, ext string, reg, num int16, isAmount, isIndex bool) error {

pkg syscall (darwin-arm64), const EILSEQ = 92
pkg syscall (darwin-arm64), const EINPROGRESS = 36
pkg syscall (darwin-arm64), const EINTR = 4
pkg syscall (darwin-arm64), const EINVAL = 22
pkg syscall (darwin-arm64), const EIO = 5
pkg syscall (darwin-arm64), const EISCONN = 56
pkg syscall (darwin-arm64), const EISDIR = 21
pkg syscall (darwin-arm64), const ELAST = 106

pkg syscall (freebsd-arm64), const EILSEQ = 86
pkg syscall (freebsd-arm64), const EINPROGRESS = 36
pkg syscall (freebsd-arm64), const EINTR = 4
pkg syscall (freebsd-arm64), const EINVAL = 22
pkg syscall (freebsd-arm64), const EIO = 5
pkg syscall (freebsd-arm64), const EISCONN = 56
pkg syscall (freebsd-arm64), const EISDIR = 21
pkg syscall (freebsd-arm64), const ELAST = 96

pkg syscall (freebsd-riscv64), const EILSEQ = 86 #53466
pkg syscall (freebsd-riscv64), const EINPROGRESS = 36 #53466
pkg syscall (freebsd-riscv64), const EINTR = 4 #53466
pkg syscall (freebsd-riscv64), const EINVAL = 22 #53466
pkg syscall (freebsd-riscv64), const EIO = 5 #53466
pkg syscall (freebsd-riscv64), const EISCONN = 56 #53466
pkg syscall (freebsd-riscv64), const EISDIR = 21 #53466

	{"fofofofofofofoffofoobarfoo", "fofoffofoobarfoo", 10},
	{"fofofofofoofofoffofoobarfoo", "foobars", -1},
	{"foofyfoobarfoobar", "y", 4},
	{"oooooooooooooooooooooo", "r", -1},
	{"oxoxoxoxoxoxoxoxoxoxoxoy", "oy", 22},
	{"oxoxoxoxoxoxoxoxoxoxoxox", "oy", -1},
	// test fallback to Rabin-Karp.
	{"000000000000000000000000000000000000000000000000000000000000000000000001", "0000000000000000000000000000000000000000000000000000000000000000001", 5},