- Sort Score
- Result 10 results
- Languages All
Results 21 - 30 of 32 for Fmask (0.06 sec)
-
src/cmd/link/internal/ld/elf.go
// uint8_t cpr2_size; // /* The floating-point ABI. */ // uint8_t fp_abi; // /* Processor-specific extension. */ // uint32_t isa_ext; // /* Mask of ASEs used. */ // uint32_t ases; // /* Mask of general flags. */ // uint32_t flags1; // uint32_t flags2; // } Elf_Internal_ABIFlags_v0; func elfWriteMipsAbiFlags(ctxt *Link) int { sh := elfshname(".MIPS.abiflags")
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Mon Apr 22 13:29:54 UTC 2024 - 63.6K bytes - Viewed (0) -
src/cmd/compile/internal/ppc64/ssa.go
p := s.Prog(v.Op.Asm()) p.From.Type = obj.TYPE_CONST p.From.Offset = v.AuxInt p.Reg = v.Args[0].Reg() p.To.Type = obj.TYPE_REG p.To.Reg = v.Reg() // Auxint holds encoded rotate + mask case ssa.OpPPC64RLWINM, ssa.OpPPC64RLWMI: sh, mb, me, _ := ssa.DecodePPC64RotateMask(v.AuxInt) p := s.Prog(v.Op.Asm()) p.To = obj.Addr{Type: obj.TYPE_REG, Reg: v.Reg()} p.Reg = v.Args[0].Reg()
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Wed May 22 19:59:38 UTC 2024 - 55.4K bytes - Viewed (0) -
guava/src/com/google/common/collect/MapMakerInternalMap.java
* <p>This must be a (2^n)-1 as it is used as a mask. */ static final int DRAIN_THRESHOLD = 0x3F; /** * Maximum number of entries to be drained in a single cleanup run. This applies independently to * the cleanup queue and both reference queues. */ // TODO(fry): empirically optimize this static final int DRAIN_MAX = 16; // Fields /**
Registered: Wed Jun 12 16:38:11 UTC 2024 - Last Modified: Sat May 18 03:24:34 UTC 2024 - 90.8K bytes - Viewed (0) -
android/guava/src/com/google/common/collect/MapMakerInternalMap.java
* <p>This must be a (2^n)-1 as it is used as a mask. */ static final int DRAIN_THRESHOLD = 0x3F; /** * Maximum number of entries to be drained in a single cleanup run. This applies independently to * the cleanup queue and both reference queues. */ // TODO(fry): empirically optimize this static final int DRAIN_MAX = 16; // Fields /**
Registered: Wed Jun 12 16:38:11 UTC 2024 - Last Modified: Sat May 18 03:24:34 UTC 2024 - 90.8K bytes - Viewed (0) -
src/net/netip/netip_test.go
bits: 20, p: mustPrefix("255.255.240.0/20"), ok: true, }, { // Partially masking one byte that contains both // 1s and 0s on either side of the mask limit. ip: mustIP("100.98.156.66"), bits: 10, p: mustPrefix("100.64.0.0/10"), ok: true, }, }, }, { family: "IPv6", subtests: makeIPv6(""),
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Tue Jun 04 17:10:01 UTC 2024 - 54.3K bytes - Viewed (0) -
src/time/format.go
stdSeparatorShift = 28 // extra argument in high 4 bits for fractional second separators stdMask = 1<<stdArgShift - 1 // mask out argument ) // std0x records the std values for "01", "02", ..., "06". var std0x = [...]int{stdZeroMonth, stdZeroDay, stdZeroHour12, stdZeroMinute, stdZeroSecond, stdYear}
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Tue Jun 11 17:09:28 UTC 2024 - 49.3K bytes - Viewed (0) -
src/runtime/traceback.go
} bits := *(*uint8)(add(liveInfo, uintptr(liveIdx)+uintptr(slotIdx/8))) return bits&(1<<(slotIdx%8)) != 0 } print1 := func(off, sz, slotIdx uint8) { x := readUnaligned64(add(argp, uintptr(off))) // mask out irrelevant bits if sz < 8 { shift := 64 - sz*8 if goarch.BigEndian { x = x >> shift } else { x = x << shift >> shift } } print(hex(x)) if !isLive(off, slotIdx) {
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Wed May 29 16:25:21 UTC 2024 - 55.1K bytes - Viewed (0) -
tensorflow/compiler/mlir/tensorflow/ir/tf_ops.td
If `x` and `y` are vectors or higher rank, then `condition` must be either a scalar, a vector with size matching the first dimension of `x`, or must have the same shape as `x`. The `condition` tensor acts as a mask that chooses, based on the value at each element, whether the corresponding element / row in the output should be taken from `x` (if true) or `y` (if false).
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Wed Apr 24 04:08:35 UTC 2024 - 90.5K bytes - Viewed (0) -
src/cmd/compile/internal/ssa/_gen/PPC64.rules
(RotateLeft(32|64) ...) => ((ROTLW|ROTL) ...) // Constant rotate generation (ROTLW x (MOVDconst [c])) => (ROTLWconst x [c&31]) (ROTL x (MOVDconst [c])) => (ROTLconst x [c&63]) // Combine rotate and mask operations (ANDconst [m] (ROTLWconst [r] x)) && isPPC64WordRotateMask(m) => (RLWINM [encodePPC64RotateMask(r,m,32)] x) (AND (MOVDconst [m]) (ROTLWconst [r] x)) && isPPC64WordRotateMask(m) => (RLWINM [encodePPC64RotateMask(r,m,32)] x)
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Fri Jun 07 19:02:52 UTC 2024 - 53.2K bytes - Viewed (0) -
src/runtime/asm_amd64.s
AESENC runtime·aeskeysched+16(SB), X0 AESENC runtime·aeskeysched+32(SB), X0 MOVQ X0, AX // return X0 RET noaes: JMP runtime·memhash64Fallback<ABIInternal>(SB) // simple mask to get rid of data in the high part of the register. DATA masks<>+0x00(SB)/8, $0x0000000000000000 DATA masks<>+0x08(SB)/8, $0x0000000000000000 DATA masks<>+0x10(SB)/8, $0x00000000000000ff
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Sat May 11 20:38:24 UTC 2024 - 60.4K bytes - Viewed (0)