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tensorflow/compiler/mlir/tensorflow/tests/gpu_fusion.mlir
// Since the tf.AddV2 op has two uses, we have a _FusedBatchNormEx without the // Relu activation and we only fuse the add. // CHECK-NEXT: %[[Y:[a-z0-9]*]], {{.*}}_FusedBatchNormEx // CHECK-NEXT: %[[relu:[a-z0-9]*]] ={{.*}}Relu"(%[[Y]] // CHECK-NEXT: return %[[relu]]
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Thu Mar 24 05:47:26 UTC 2022 - 3.6K bytes - Viewed (0) -
tensorflow/compiler/mlir/lite/experimental/tac/tests/tac-filter.mlir
// CHECK: tfl.add // CHECK-SAME: tac.skip_target_annotation %1 = "tfl.add"(%arg0, %0) {fused_activation_function = "RELU"} : (tensor<1xf32>, tensor<1xf32>) -> tensor<1xf32> // CHECK: tfl.relu // CHECK-SAME: tac.skip_target_annotation %2 = "tfl.relu"(%arg0) : (tensor<1xf32>) -> tensor<1xf32> func.return } } // -----
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Wed May 24 01:08:29 UTC 2023 - 3.5K bytes - Viewed (0) -
tensorflow/compiler/mlir/lite/tests/raise-custom-ops.mlir
// will be preserved since it has uses. %2 = "tf.MyCustomOp"(%1, %0) {fused_activation_function = "RELU", int_attr = 2 : i32} : (tensor<4xf32>, tensor<4xf32>) -> tensor<4xf32> // will be preserved since it has side-effect. "tf.MyCustomOp"(%1, %0) {fused_activation_function = "RELU", int_attr = 2 : i32} : (tensor<4xf32>, tensor<4xf32>) -> tensor<4xf32> func.return %2 : tensor<4xf32>
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Mon Oct 30 06:52:55 UTC 2023 - 4K bytes - Viewed (0) -
tensorflow/compiler/mlir/tensorflow/tests/device_assignment_by_func_attr.mlir
// CHECK: device = "cpu" %2 = "tf.Relu"(%1) {T = f32, _output_shapes = ["tfshape$dim { size: 3 } dim { size: 3 }"], device = "cpu"} : (tensor<3x3xf32>) -> tensor<3x3xf32> // CHECK: device = "xpu" %3 = "tf.Relu"(%2) {T = f32, _output_shapes = ["tfshape$dim { size: 3 } dim { size: 3 }"]} : (tensor<3x3xf32>) -> tensor<3x3xf32> func.return %3 : tensor<3x3xf32>
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Tue May 10 00:30:05 UTC 2022 - 1.6K bytes - Viewed (0) -
tensorflow/compiler/mlir/tfr/examples/mnist/ops_defs.py
if act == 'RELU': return tf.raw_ops.Relu(features=res) elif act == 'RELU6': return tf.raw_ops.Relu6(features=res) elif act == 'TANH': return tf.raw_ops.Tanh(x=res) else: return res @tf.RegisterGradient('NewConv2D') def _conv_add_relu_grad(op: ops.Operation, grad): act = op.get_attr('act') y = op.outputs[0] if act == 'RELU': grad = gen_nn_ops.relu_grad(grad, y)
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Thu Aug 31 20:23:51 UTC 2023 - 6.8K bytes - Viewed (0) -
tensorflow/compiler/mlir/tensorflow/utils/cluster_util_test.cc
func.func @main(%arg0: tensor<?xi32>) -> (tensor<?xi32>, tensor<?xi32>) { %0 = "tf.Relu"(%arg0) : (tensor<?xi32>) -> tensor<?xi32> %1 = "tf.Relu"(%0) {device = "tpu0"} : (tensor<?xi32>) -> tensor<?xi32> %2 = "tf.Add"(%0, %1) {device = "tpu0"} : (tensor<?xi32>, tensor<?xi32>) -> tensor<?xi32> %3 = "tf.Relu"(%2) : (tensor<?xi32>) -> tensor<?xi32> %4 = "tf.Relu"(%1) {device = "tpu0"} : (tensor<?xi32>) -> tensor<?xi32>
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Fri Apr 26 09:37:10 UTC 2024 - 7.8K bytes - Viewed (0) -
tensorflow/compiler/mlir/tfrt/tests/ir/testdata/test.mlir
%cpu = corert.get_op_handler %ch "cpu" %0 = corert.executeop(%cpu) "tf.Relu"(%arg0) { T = f32 } : 1 %arg1 = tfrt_fallback_async.corert_tensorhandle_to_fallback_tensor %arg1_th {_tfrt_cost = 1 : i64, device = "/CPU:0"} : (!corert.tensorhandle) -> (!tfrt_fallback.tf_tensor) %1 = tfrt_fallback_async.executeop key(0) cost(100) device("/CPU:0") "tf.Relu"(%arg1) { T = f32 } : 1 tfrt.return
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Fri Mar 25 11:03:04 UTC 2022 - 496 bytes - Viewed (0) -
tensorflow/compiler/mlir/tensorflow/transforms/gpu_fusion.cc
rewriter.replaceOp(batch_norm, op->getResults()); // Depending on the case, we may fuse the add, the relu, or both. if (!add_op || add_op.getZ().hasOneUse()) { // We fuse the Relu only if the add has a single use, otherwise we only // fuse the add itself. op->setAttr("activation_mode", rewriter.getStringAttr("Relu")); rewriter.replaceOp(relu_op, op->getResult(0)); } if (add_op) {
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Thu Nov 03 12:35:38 UTC 2022 - 5.2K bytes - Viewed (0) -
tensorflow/compiler/mlir/tfrt/tests/analysis/testdata/test.mlir
%cpu = corert.get_op_handler %ch "cpu" %0 = corert.executeop(%cpu) "tf.Relu"(%arg0) { T = f32 } : 1 %arg1 = tfrt_fallback_async.corert_tensorhandle_to_fallback_tensor %arg1_th {_tfrt_cost = 1 : i64, device = "/CPU:0"} : (!corert.tensorhandle) -> (!tfrt_fallback.tf_tensor) %1 = tfrt_fallback_async.executeop key(0) cost(100) device("/CPU:0") "tf.Relu"(%arg1) { T = f32 } : 1 tfrt.return
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Thu Dec 29 18:20:20 UTC 2022 - 496 bytes - Viewed (0) -
tensorflow/compiler/mlir/quantization/tensorflow/tests/fake_quant_e2e_xla.mlir
// CHECK: %[[cast:.*]] = "tf.Cast"(%[[sub]]) <{Truncate = false}> : (tensor<1x3x2x2xi32>) -> tensor<1x3x2x2xf32> // CHECK: %[[dequant1:.*]] = "tf.Mul"(%[[cast]] // CHECK: %[[relu:.*]] = "tf.Relu"(%[[dequant1]] // CHECK: %[[clamped:.*]] = "tf.Minimum"(%[[relu]] // CHECK: %[[rescale1:.*]] = "tf.Mul"(%[[cast]] // CHECK: %[[add2:.*]] = "tf.AddV2"(%[[rescale1]] // CHECK: %[[maximum2:.*]] = "tf.Maximum"(%[[add2]]
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Mon Oct 30 06:52:55 UTC 2023 - 7.2K bytes - Viewed (0)