{name: "RSBconst", argLength: 1, reg: gp11, asm: "RSB", aux: "Int32"},     // auxInt - arg0
		{name: "MUL", argLength: 2, reg: gp21, asm: "MUL", commutative: true},     // arg0 * arg1
		{name: "HMUL", argLength: 2, reg: gp21, asm: "MULL", commutative: true},   // (arg0 * arg1) >> 32, signed

		switch p.As {
		case AADDI, ASLTI, ASLTIU, AANDI, AORI, AXORI, ASLLI, ASRLI, ASRAI,
			AADDIW, ASLLIW, ASRLIW, ASRAIW, AADDW, ASUBW, ASLLW, ASRLW, ASRAW,
			AADD, AAND, AOR, AXOR, ASLL, ASRL, ASUB, ASRA,
			AMUL, AMULH, AMULHU, AMULHSU, AMULW, ADIV, ADIVU, ADIVW, ADIVUW,
			AREM, AREMU, AREMW, AREMUW,
			AADDUW, ASH1ADD, ASH1ADDUW, ASH2ADD, ASH2ADDUW, ASH3ADD, ASH3ADDUW, ASLLIUW,

	MULALU		R1, R2, (R4, R3)     // 9231a4e0
	MULALU.S	R1, R2, (R4, R3)     // 9231b4e0

// MUL
	MUL	R2, R3, R4           // 930204e0
	MUL	R2, R4               // 940204e0
	MUL	R2, R4, R4           // 940204e0
	MUL.S	R2, R3, R4           // 930214e0
	MUL.S	R2, R4               // 940214e0
	MUL.S	R2, R4, R4           // 940214e0
	MULU	R5, R6, R7           // 960507e0
	MULU	R5, R7               // 970507e0

	FLDLG2                                  // d9ec
	FLDPI                                   // d9eb
	//TODO: FMUL F2, F0                     // d8ca
	//TODO: FMUL F3, F0                     // d8cb
	//TODO: FMUL F0, F2                     // dcca
	//TODO: FMUL F0, F3                     // dccb
	//TODO: FMULS (BX)                      // d80b
	//TODO: FMULS (R11)                     // 41d80b

de??s??l!.&clp?d&em?i??gro?hcs?moc?ten?ude?vog??f?imaf!nacirema??l&a?il??ppus??m!.&eman?gro?lim?moc?t&en?opsgolb,?ude?vog?zib??edaca!.laiciffo,?ra??n&apmoc?os??o&j?s??p!.&gro?lim?moc?pooc?ten?ude?vog???r&e&corg?grus?llag?viled??lewej?otcerid?tnuoc?uxul??s!.&gro?lim?moc?ten?ude?vog??pil??t&efas?i&c?ledif?nummoc!.&bdnevar,gon,murofym,??r&ahc?uces??srevinu??laer?r&ap!.oby,?eporp??uaeb??u!.&bug?gro?lim?moc!.topsgolb,?ten?ude??b!tseb???van?xes??z&a!.&eman?gro?lim?moc?o&fni?rp??pp?t&en?ni??ude?vog?zib...

de??s??l!.&clp?d&em?i??gro?hcs?moc?ten?ude?vog??f?imaf!nacirema??l&a?il??ppus??m!.&eman?gro?lim?moc?t&en?opsgolb,?ude?vog?zib??edaca!.laiciffo,?ra??n&apmoc?os??o&j?s??p!.&gro?lim?moc?pooc?ten?ude?vog???r&e&corg?grus?llag?viled??lewej?otcerid?tnuoc?uxul??s!.&gro?lim?moc?ten?ude?vog??pil??t&efas?i&c?ledif?nummoc!.&bdnevar,gon,murofym,??r&ahc?uces??srevinu??laer?r&ap!.oby,?eporp??uaeb??u!.&bug?gro?lim?moc!.topsgolb,?ten?ude??b!tseb???van?xes??z&a!.&eman?gro?lim?moc?o&fni?rp??pp?t&en?ni??ude?vog?zib...

(MOVWnop (MOVWconst [c])) => (MOVWconst [c])

// mul by constant
(MUL x (MOVWconst [c])) && int32(c) == -1 => (RSBconst [0] x)
(MUL _ (MOVWconst [0])) => (MOVWconst [0])
(MUL x (MOVWconst [1])) => x
(MUL x (MOVWconst [c])) && isPowerOfTwo32(c) => (SLLconst [int32(log32(c))] x)
(MUL x (MOVWconst [c])) && isPowerOfTwo32(c-1) && c >= 3 => (ADDshiftLL x x [int32(log32(c-1))])

(Sub(32|64)F ...) => (FSUB(S|D) ...)

(Mul64 ...) => (MUL ...)
(Mul(32|16|8) ...) => (MULW ...)
(Mul(32|64)F  ...) => (FMUL(S|D) ...)

(Hmul64  ...) => (MULH ...)
(Hmul64u ...) => (UMULH ...)
(Hmul32  x y) => (SRAconst (MULL <typ.Int64> x y) [32])
(Hmul32u x y) => (SRAconst (UMULL <typ.UInt64> x y) [32])
(Select0 (Mul64uhilo x y)) => (UMULH x y)
(Select1 (Mul64uhilo x y)) => (MUL x y)

(Div64 [false] x y) => (DIV  x y)

			},
			outputs: []outputInfo{
				{0, 21503}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14
			},
		},
	},
	{
		name:        "MUL",
		argLen:      2,
		commutative: true,
		asm:         arm.AMUL,
		reg: regInfo{
			inputs: []inputInfo{
				{0, 22527}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 g R12 R14
				{1, 22527}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 g R12 R14
			},

	_ka  = 528
	_kk  = 578
	_km  = 586
	_kn  = 593
	_ko  = 596
	_ky  = 650
	_lo  = 696
	_lt  = 704
	_lv  = 711
	_mk  = 767
	_ml  = 772
	_mn  = 779
	_mo  = 784
	_mr  = 795
	_ms  = 799
	_mul = 806
	_my  = 817
	_nb  = 839
	_ne  = 849
	_nl  = 871
	_no  = 879
	_pa  = 925
	_pl  = 947
	_pt  = 960
	_ro  = 988
	_ru  = 994
	_sh  = 1031
	_si  = 1036
	_sk  = 1042
	_sl  = 1046