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Results 91 - 100 of 227 for regI (1.12 sec)
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src/cmd/vendor/golang.org/x/arch/ppc64/ppc64asm/decode.go
return nil case TypeReg: return R0 + Reg(a.BitFields.Parse(i)) case TypeCondRegBit: return Cond0LT + CondReg(a.BitFields.Parse(i)) case TypeCondRegField: return CR0 + CondReg(a.BitFields.Parse(i)) case TypeFPReg: return F0 + Reg(a.BitFields.Parse(i)) case TypeVecReg: return V0 + Reg(a.BitFields.Parse(i)) case TypeVecSReg: return VS0 + Reg(a.BitFields.Parse(i)) case TypeVecSpReg:
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Tue Nov 22 17:16:14 UTC 2022 - 5.6K bytes - Viewed (0) -
src/cmd/vendor/golang.org/x/arch/ppc64/ppc64asm/inst.go
return opstr[o] } // An Arg is a single instruction argument, one of these types: Reg, CondReg, SpReg, Imm, PCRel, Label, or Offset. type Arg interface { IsArg() String() string } // An Args holds the instruction arguments. // If an instruction has fewer than 6 arguments, // the final elements in the array are nil. type Args [6]Arg // A Reg is a single register. The zero value means R0, not the absence of a register.
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Mon May 03 01:35:44 UTC 2021 - 4.5K bytes - Viewed (0) -
src/cmd/compile/internal/ssagen/arch.go
// at n+off (n is PPARAMOUT) to register reg. The result is already in // memory. Used in open-coded defer return path. LoadRegResult func(s *State, f *ssa.Func, t *types.Type, reg int16, n *ir.Name, off int64) *obj.Prog // SpillArgReg emits instructions that spill reg to n+off. SpillArgReg func(pp *objw.Progs, p *obj.Prog, f *ssa.Func, t *types.Type, reg int16, n *ir.Name, off int64) *obj.Prog
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Tue Aug 03 21:05:55 UTC 2021 - 1.5K bytes - Viewed (0) -
src/cmd/vendor/golang.org/x/arch/arm64/arm64asm/inst.go
return fmt.Sprintf("V%d", int(r-V0)) default: return fmt.Sprintf("Reg(%d)", int(r)) } } // A RegSP represent a register and X31/W31 is regarded as SP/WSP. type RegSP Reg func (RegSP) isArg() {} func (r RegSP) String() string { switch Reg(r) { case WSP: return "WSP" case SP: return "SP" default: return Reg(r).String() } } type ImmShift struct { imm uint16
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Thu Oct 19 23:33:33 UTC 2023 - 21.5K bytes - Viewed (0) -
src/syscall/mksyscall.pl
my ($name, $type) = parseparam($p); my $reg = ""; if($name eq "err" && !$plan9) { $reg = "e1"; $ret[2] = $reg; $do_errno = 1; } elsif($name eq "err" && $plan9) { $ret[0] = "r0"; $ret[2] = "e1"; next; } else { $reg = sprintf("r%d", $i); $ret[$i] = $reg; } if($type eq "bool") { $reg = "$reg != 0"; } if($type eq "int64" && $_32bit ne "") {
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Fri May 24 17:15:02 UTC 2024 - 10.3K bytes - Viewed (0) -
src/cmd/vendor/golang.org/x/arch/arm/armasm/gnu.go
sep = ", " } } fmt.Fprintf(&buf, "}") return buf.String() case RegShift: if arg.Shift == ShiftLeft && arg.Count == 0 { return gnuArg(inst, -1, arg.Reg) } if arg.Shift == RotateRightExt { return gnuArg(inst, -1, arg.Reg) + ", rrx" } return fmt.Sprintf("%s, %s #%d", gnuArg(inst, -1, arg.Reg), strings.ToLower(arg.Shift.String()), arg.Count)
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Sat May 14 17:21:52 UTC 2016 - 3.5K bytes - Viewed (0) -
src/cmd/internal/obj/ppc64/asm_test.go
{obj.Addr{Type: obj.TYPE_REG, Reg: REG_R1}, C_REG}, {obj.Addr{Type: obj.TYPE_REG, Reg: REG_R2}, C_REGP}, {obj.Addr{Type: obj.TYPE_REG, Reg: REG_F1}, C_FREG}, {obj.Addr{Type: obj.TYPE_REG, Reg: REG_F2}, C_FREGP}, {obj.Addr{Type: obj.TYPE_REG, Reg: REG_V2}, C_VREG}, {obj.Addr{Type: obj.TYPE_REG, Reg: REG_VS1}, C_VSREG}, {obj.Addr{Type: obj.TYPE_REG, Reg: REG_VS2}, C_VSREGP},
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Fri Feb 09 22:14:57 UTC 2024 - 17.3K bytes - Viewed (0) -
src/cmd/compile/internal/riscv64/ggen.go
// loop: // MOV ZERO, (T0) // ADD $Widthptr, T0 // BNE T0, T1, loop p = pp.Append(p, riscv.AADD, obj.TYPE_CONST, 0, off, obj.TYPE_REG, riscv.REG_T0, 0) p.Reg = riscv.REG_SP p = pp.Append(p, riscv.AADD, obj.TYPE_CONST, 0, cnt, obj.TYPE_REG, riscv.REG_T1, 0) p.Reg = riscv.REG_T0 p = pp.Append(p, riscv.AMOV, obj.TYPE_REG, riscv.REG_ZERO, 0, obj.TYPE_MEM, riscv.REG_T0, 0) loop := p
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Tue Apr 19 15:59:22 UTC 2022 - 1.8K bytes - Viewed (0) -
pilot/pkg/autoregistration/controller_test.go
var ( tmplA = &v1alpha3.WorkloadGroup{ Template: &v1alpha3.WorkloadEntry{ Ports: map[string]uint32{"http": 80}, Labels: map[string]string{"app": "a"}, Network: "nw0", Locality: "reg0/zone0/subzone0", Weight: 1, ServiceAccount: "sa-a", }, } wgA = config.Config{ Meta: config.Meta{ GroupVersionKind: gvk.WorkloadGroup, Namespace: "a",
Registered: Fri Jun 14 15:00:06 UTC 2024 - Last Modified: Tue Apr 16 00:00:36 UTC 2024 - 31.4K bytes - Viewed (0) -
src/runtime/mbarrier.go
} memmove(dst, src, size) // Move pointers returned in registers to a place where the GC can see them. for i := range regs.Ints { if regs.ReturnIsPtr.Get(i) { regs.Ptrs[i] = unsafe.Pointer(regs.Ints[i]) } } } // typedslicecopy should be an internal detail, // but widely used packages access it using linkname.
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Wed May 29 17:58:53 UTC 2024 - 15.7K bytes - Viewed (0)