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Results 81 - 90 of 101 for type_attr (0.18 sec)
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tensorflow/compiler/mlir/tensorflow/transforms/resource_op_lifting.cc
for (auto& it : hoister.GetResources()) { BlockArgument arg = mlir::dyn_cast<BlockArgument>(it.first); assert(arg && "Expect resources for FuncOp to be its arguments"); auto type_iter = resource_data_types.find(arg.getArgNumber()); if (type_iter == resource_data_types.end()) { // Skip lifting the resource if it's not present in the data type map. // This indicates that the resource is not to be lifted because it is used
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Thu Apr 25 16:01:03 UTC 2024 - 55.1K bytes - Viewed (0) -
src/cmd/internal/obj/arm64/obj7.go
// internally defined symbols. if p.From.Type == obj.TYPE_ADDR && p.From.Name == obj.NAME_EXTERN && !p.From.Sym.Local() { // MOVD $sym, Rx becomes MOVD sym@GOT, Rx // MOVD $sym+<off>, Rx becomes MOVD sym@GOT, Rx; ADD <off>, Rx if p.As != AMOVD { c.ctxt.Diag("do not know how to handle TYPE_ADDR in %v with -dynlink", p) } if p.To.Type != obj.TYPE_REG {
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Wed Nov 08 05:46:32 UTC 2023 - 28.4K bytes - Viewed (0) -
src/cmd/asm/internal/asm/asm.go
} name := symbolName(&nameAddr) // Operand 1 is an immediate constant or address. valueAddr := p.address(operands[1]) switch valueAddr.Type { case obj.TYPE_CONST, obj.TYPE_FCONST, obj.TYPE_SCONST, obj.TYPE_ADDR: // OK default: p.errorf("DATA value must be an immediate constant or address") return } // The addresses must not overlap. Easiest test: require monotonicity.
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Wed May 22 02:04:54 UTC 2024 - 25.5K bytes - Viewed (0) -
src/cmd/internal/obj/x86/asm6.go
ctxt.Diag("offset too large in %s", p) } } v := int32(a.Offset) rel.Siz = 0 switch a.Type { case obj.TYPE_ADDR: if a.Name == obj.NAME_NONE { ctxt.Diag("unexpected TYPE_ADDR with NAME_NONE") } if a.Index == REG_TLS { ctxt.Diag("unexpected TYPE_ADDR with index==REG_TLS") } goto bad case obj.TYPE_REG: const regFirst = REG_AL const regLast = REG_Z31
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Wed May 15 15:44:14 UTC 2024 - 146.9K bytes - Viewed (0) -
tensorflow/compiler/mlir/lite/transforms/lower_static_tensor_list.cc
BoolAttr true_attr = rewriter.getBoolAttr(true); auto shape = rewriter.create<TF::ShapeOp>(loc, input_handle, /*use_32bit=*/true_attr); rewriter.replaceOpWithNewOp<TF::GatherOp>( op, op.getType(), shape, CreateI32SplatConst(loc, &rewriter, {}, 0), /*validate_indices=*/true_attr); return success(); } };
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Tue Jun 11 20:00:43 UTC 2024 - 70.7K bytes - Viewed (0) -
tensorflow/compiler/mlir/lite/experimental/tac/transforms/device_transform_patterns.cc
mean_op.getAxis(), mean_op.getKeepDims()); // Insert a requant op. rewriter.replaceOpWithNewOp<TFL::QuantizeOp>( mean_op, output_type, new_mean_op, mlir::TypeAttr::get(output_type)); return success(); } } // namespace tac } // namespace TFL
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Thu Apr 25 16:01:03 UTC 2024 - 25.4K bytes - Viewed (0) -
src/cmd/internal/obj/link.go
// reg = reg (REG_*) // index = index (REG_*) // scale = scale (1, 2, 4, 8) // // $<mem> // Effective address of memory reference <mem>, defined above. // Encoding: same as memory reference, but type = TYPE_ADDR. // // $<±integer value> // This is a special case of $<mem>, in which only ±offset is present. // It has a separate type for easy recognition. // Encoding: // type = TYPE_CONST // offset = ±integer value
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Wed May 15 19:57:43 UTC 2024 - 33.1K bytes - Viewed (0) -
src/cmd/internal/obj/util.go
// Make sure 1 prints as 1.0 if !strings.ContainsAny(str, ".e") { str += ".0" } fmt.Fprintf(w, "$(%s)", str) case TYPE_SCONST: fmt.Fprintf(w, "$%q", a.Val.(string)) case TYPE_ADDR: io.WriteString(w, "$") a.writeNameTo(w, abiDetail) case TYPE_SHIFT: v := int(a.Offset) ops := "<<>>->@>" switch buildcfg.GOARCH { case "arm": op := ops[((v>>5)&3)<<1:]
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Wed May 15 15:44:14 UTC 2024 - 17.5K bytes - Viewed (0) -
tensorflow/compiler/mlir/lite/ir/tfl_ops.cc
int64_t out = 0; for (int64_t outer = 0; outer < outer_size; ++outer) { for (auto op : operands) { auto typed_attr = op.cast<TypedAttr>(); const int64_t dim_size = typed_attr.getType().cast<RankedTensorType>().getDimSize(axis); const int64_t inner_size = dim_size * base_inner_size;
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Thu May 02 09:41:17 UTC 2024 - 169.2K bytes - Viewed (0) -
tensorflow/compiler/mlir/lite/flatbuffer_operator.cc
return builder.getI32IntegerAttr(value); } static mlir::Attribute BuildTypeAttr(tflite::TensorType value, mlir::Builder builder) { return mlir::TypeAttr::get(ConvertElementType(value, builder)); } static mlir::Attribute BuildTFL_AFAttr(tflite::ActivationFunctionType value, mlir::Builder builder) {
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Tue May 21 18:21:50 UTC 2024 - 38K bytes - Viewed (0)