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Results 61 - 63 of 63 for r26 (1.06 sec)

  1. src/runtime/asm_mipsx.s

    	MOVW	R18, 72(R29)
    	MOVW	R19, 76(R29)
    	MOVW	R20, 80(R29)
    	// R21 already saved
    	// R22 already saved.
    	MOVW	R22, 84(R29)
    	// R23 is tmp register.
    	MOVW	R24, 88(R29)
    	MOVW	R25, 92(R29)
    	// R26 is reserved by kernel.
    	// R27 is reserved by kernel.
    	MOVW	R28, 96(R29)
    	// R29 is SP.
    	// R30 is g.
    	// R31 is LR, which was saved by the prologue.
    
    	CALL	runtime·wbBufFlush(SB)
    
    	MOVW	4(R29), R20
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Mon May 06 11:46:29 UTC 2024
    - 26.3K bytes
    - Viewed (0)
  2. src/crypto/internal/nistec/p256_asm_arm64.s

    #define const0 R15
    #define const1 R16
    
    #define hlp0 R17
    #define hlp1 res_ptr
    
    #define x0 R19
    #define x1 R20
    #define x2 R21
    #define x3 R22
    #define y0 R23
    #define y1 R24
    #define y2 R25
    #define y3 R26
    
    #define const2 t2
    #define const3 t3
    
    DATA p256const0<>+0x00(SB)/8, $0x00000000ffffffff
    DATA p256const1<>+0x00(SB)/8, $0xffffffff00000001
    DATA p256ordK0<>+0x00(SB)/8, $0xccd1c8aaee00bc4f
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Mon Mar 04 17:29:44 UTC 2024
    - 29.7K bytes
    - Viewed (0)
  3. src/cmd/compile/internal/ssa/_gen/ARM64.rules

    	&& s > 64 && s <= 16*64 && s%16 == 0
    	&& !config.noDuffDevice && logLargeCopy(v, s) =>
    	(DUFFCOPY [8 * (64 - s/16)] dst src mem)
    // 8 is the number of bytes to encode:
    //
    // LDP.P   16(R16), (R26, R27)
    // STP.P   (R26, R27), 16(R17)
    //
    // 64 is number of these blocks. See runtime/duff_arm64.s:duffcopy
    
    // large move uses a loop
    (Move [s] dst src mem)
    	&& s%16 == 0 && (s > 16*64 || config.noDuffDevice)
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Thu May 23 15:49:20 UTC 2024
    - 113.1K bytes
    - Viewed (0)
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