config_setting(
    name = "linux_x86_64_no_sse",
    constraint_values =
        [
            "@platforms//cpu:x86_64",
            "@platforms//os:linux",
        ],
    values = {
        "copt": "-mno-sse4.2",
    },
    visibility = ["//visibility:public"],
)

# This condition takes precedence over :linux_x86_64
# TODO(b/290533709): Remove this with PJRT build rule cleanup.
config_setting(

	CSUBW	X10, X11, X12				// ERROR "rd must be the same as rs1"
	CSUBW	X5, X11					// ERROR "expected integer prime register in rs2"
	CSUBW	X10, X5					// ERROR "expected integer prime register in rd"
	CNOP	X10					// ERROR "expected no register in rs2"
	CEBREAK	X10					// ERROR "expected no register in rs2"

	//
	// "V" Standard Extension for Vector Operations, Version 1.0
	//

	B	foo(SB)    // JMP foo(SB)
	BEQ	1(PC)
	BEQ	2(PC)
	TBZ	$1, R1, 2(PC)
	TBNZ	$2, R2, 2(PC)
	JMP	foo(SB)
	CALL	foo(SB)

// ADR
	ADR	next, R11     // ADR R11 // 2b000010
next:
	NOP
	ADR -2(PC), R10    // 0a000010
	ADR 2(PC), R16     // 10000010
	ADR -26(PC), R1    // 01000010
	ADR 12(PC), R2     // 02000010
	ADRP -2(PC), R10   // 0a000090
	ADRP 2(PC), R16    // 10000090

    in1.close()
    call1.cancel()
    val call2 = client.newCall(newRequest("/"))
    val response2 = call2.execute()
    val in2 = response2.body.byteStream()
    assertThat(readAscii(in2, 5)).isEqualTo("LMNOP")
    in2.close()
    call2.cancel()
    assertThat(server.takeRequest().exchangeIndex).isEqualTo(0)
    // Connection is pooled!
    assertThat(server.takeRequest().exchangeIndex).isEqualTo(1)
  }

* Added `spec.additionalPrinterColumns` to CRDs to define server side printing columns. ([#60991](https://github.com/kubernetes/kubernetes/pull/60991), [@sttts](https://github.com/sttts))
* Added CRD Versioning with NOP converter ([#63830](https://github.com/kubernetes/kubernetes/pull/63830), [@mbohlool](https://github.com/mbohlool))

R10, R14 ORQ R13, R12 XORQ R13, R14 XORQ R11, R12 MOVQ R14, 24(DI) MOVQ R12, 8(DI) NOP // Result g MOVQ 72(SP), R11 XORQ R9, R11 MOVQ 80(SP), R12 ROLQ $0x14, R11 XORQ BX, R12 ROLQ $0x03, R12 MOVQ 24(SP), R10 MOVQ R11, AX ORQ R12, AX XORQ R8, R10 MOVQ 128(SP), R13 MOVQ 176(SP), R14 ROLQ $0x1c, R10 XORQ R10, AX MOVQ AX, 40(DI) NOP XORQ CX, R13 ROLQ $0x2d, R13 MOVQ R12, AX ANDQ R13, AX XORQ R11, AX MOVQ AX, 48(DI) NOP XORQ DX, R14 ROLQ $0x3d, R14 MOVQ R14, AX ORQ R10, AX XORQ R13, AX MOVQ AX, 64(DI)...

R10, R14 ORQ R13, R12 XORQ R13, R14 XORQ R11, R12 MOVQ R14, 24(DI) MOVQ R12, 8(DI) NOP // Result g MOVQ 72(SP), R11 XORQ R9, R11 MOVQ 80(SP), R12 ROLQ $0x14, R11 XORQ BX, R12 ROLQ $0x03, R12 MOVQ 24(SP), R10 MOVQ R11, AX ORQ R12, AX XORQ R8, R10 MOVQ 128(SP), R13 MOVQ 176(SP), R14 ROLQ $0x1c, R10 XORQ R10, AX MOVQ AX, 40(DI) NOP XORQ CX, R13 ROLQ $0x2d, R13 MOVQ R12, AX ANDQ R13, AX XORQ R11, AX MOVQ AX, 48(DI) NOP XORQ DX, R14 ROLQ $0x3d, R14 MOVQ R14, AX ORQ R10, AX XORQ R13, AX MOVQ AX, 64(DI)...

	//TODO: FMULP F0, F2                    // deca
	//TODO: FMULP F0, F3                    // decb
	//TODO: FNCLEX                          // dbe2
	//TODO: FNINIT                          // dbe3
	FNOP                                    // d9d0
	//TODO: FNSAVEL (BX)                    // dd33
	//TODO: FNSAVEL (R11)                   // 41dd33
	//TODO: FNSTCW (BX)                     // d93b